![](http://datasheet.mmic.net.cn/370000/UPD6708_datasheet_16740712/UPD6708_47.png)
47
μ
PD6708
Table 7-4. Placing Receive Data in RDB
Parameter/
Communication Data
Areas where RDB is read
Time (
μ
s)
Note
Mode 0
Mode 1
Mode 2
Master address
When ACK bit is received in message length field
0
0
0
Control bits
Message length bits
Receive data (first byte)
When first ACK bit is received in data field
Approx. 1580
Approx. 400
Approx. 290
Receive data (second byte)
When second ACK bit is received in data field
Approx. 3160
Approx. 800
Approx. 580
Receive data (N-th byte)
When N-th ACK bit is received in data field
Approx. 1580
×
N
Approx. 400
×
N
Approx. 290
×
N
Note
Minimum time after the “slave reception start” return code is placed in STR and an interrupt request is generated.
7.5
Broadcast Reception
(1)
When a broadcast reception unit receives the message length field, the master address, control bits and message
length bits are placed in RDB as shown in Figure 7-6, a “broadcast reception start” return code (CH) is placed in STR,
and an interrupt request is generated.
Figure 7-6. Data Exchange During Broadcast Reception (Contents of RDB)
(2)
(3)
Each time one byte of receive data is received, it is placed in RDB.
Each time 20 bytes (RDB capacity) of receive data are received, if RDB is full, a “slave receive buffer full” return code
(DH) is placed in STR, and an interrupt request is generated.
After the final data of one frame is placed in RDB, a “broadcast reception normal termination” return code (EH) is placed
in STR and an interrupt request is generated.
If a communication error occurs during reception and communication stops without receiving all of the data transmitted
from the master unit, a “termination during broadcast reception” return code (FH) is placed in STR and an interrupt request
is generated.
(4)
(5)
The areas where the
μ
PD6708 places receive data, etc., in RDB are the same as those shown in Table 7-4.
Master Address (12 Bits)
First Byte
Second Byte
Third Byte
Fourth Byte Onward
RDB
Message Length Bits
Control Bits