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參數(shù)資料
| 型號： | UPD6708GS |
| 廠商： | NEC Corp. |
| 英文描述： | IEBusa Inter Equipment Busa PROTOCOL CONTROL LSI |
| 中文描述： | IEBusa設(shè)備布薩間協(xié)議控制大規(guī)模集成電路 |
| 文件頁數(shù)： | 23/72頁 |
| 文件大?。?/td> | 292K |
| 代理商： | UPD6708GS |
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23
μ
PD6708
4.1.4
Status register (STR)
STR is an 8-bit register used to determine the status of the
μ
PD6708.
The statuses of WDB and RDB and the status of interrupts can be read from higher 4 bits. The return code, which indicates
the result of the communication, can be read from lower 4 bits.
Table 4-2. Contents of Status Register
Bit
Value
Meaning
Description
Bit 7
1
WDB is full
Indicates whether data can be written to WDB
0
WDB is not full
Bit 6
1
RDB is empty
Indicates whether data can be read from RDB
0
RDB is not empty
Bit 5
1
WDB is empty
Indicates whether data is in WDB
0
WDB is not empty
Bit 4
1
Interrupt requested
Indicates whether interrupt servicing is being requested (Bit 4 of the status
register is reset by STR by the host controller)
0
Interrupt not requested
Bit 3 to
Bit 0
Return code
Return code will be read
4.2
Host Interface Modes
The host controller can access WDB, RDB, CMR, and STR within the
μ
PD6708 via the serial interface (SCK, SI, SO).
There are four modes for accessing the serial interface, as shown in the Table 4-3.
There are two method for switching among these four host interface modes: by using C/D pin and R/W pin, and by writing
data to CMR (software control).
Table 4-3. Host Interface Mode
Mode
Operation
Data write mode
Data input to SI pin is written to WDB from MSB at the rising edge of the serial clock input to SCK pin.
Data setting is completed at the eighth serial clock cycle.
Data read mode
RDB data is output from MSB to SO pin at the falling edge of the serial clock input to SCK pin. A data
read is completed by inputting eight serial clock cycles. Data at SI pin is ignored.
Command write mode
Data input to SI pin is written to CMR from MSB at rising edge of the serial clock input to SCK pin. Data
setting is completed at the eight serial clock cycle.
Status read mode
STR data is output from MSB to SO pin at the falling edge of the serial clock input to SCK pin. A data
read is completed by inputting eight serial clock cycles. Data at SI pin is ignored.
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