參數(shù)資料
型號(hào)： UPD44164362F5-E50-EQ1
廠商： NEC Corp.
英文描述： 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
中文描述： 1800萬(wàn)位的SRAM 2條DDRII字爆發(fā)運(yùn)作
文件頁(yè)數(shù)： 16/32頁(yè)
文件大?。?/td> 282K
代理商： UPD44164362F5-E50-EQ1
16
Data Sheet M15821EJ7V2DS
μ
PD44164082, 44164182, 44164362
Read and Write Timing
TKHKH
TKHAX
Q01
Q11
K
/LD
Address
DQ
Q02
/K
2
4
6
8
10
1
3
5
7
9
R, /W
A0
A1
A2
Qx2
Q12
TKH/KH
T/KHKH
CQ
/CQ
C
/C
TKHCH
TCHQX1
TCHQV
TCHQV
TCHQX
TCHQZ
TKHKL TKLKH TKHKH
TKH/KH
D21
D31
D22
D32
TDVKH
TKHDX
TDVKH
TKHDX
NOP
READ
(burst of 2)
READ
(burst of 2)
NOP
NOP
WRITE
(burst of 2)
WRITE
(burst of 2)
TKHKL
TIVKH
TKLKH
TKHIX
TCHCQV
TCHCQV
TCHCQX
TCHCQX
TCQHQX
TCQHQV
READ
(burst of 2)
A3
A4
TCHQX
Q41
Q42
T/KHKH
TAVKH
TKHCH
Remarks 1.
Q01 refers to output from address A0.
Q02 refers to output from the next internal burst address following A0, etc.
2.
Outputs are disable (high impedance) one clock cycle after a NOP.
3.
The second NOP cycle is not necessary for correct device operation;
however, at high clock frequencies it may be required to prevent bus contention.
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD44164362F5-E60-EQ1ES 制造商:NEC Electronics Corporation 功能描述:
UPD44165092BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:2MX9, 2BURST, 250 MHZ QDRII SRAM - Trays
UPD44165094BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 2M x 9-Bit 0.45ns 165-Pin BGA
UPD44165362BF5-E40-EQ3 制造商:Renesas Electronics Corporation 功能描述:UPD44165362BF5-E40-EQ3 - Trays
UPD44165362BF5-E40-EQ3-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Sync Dual 1.8V 18M-Bit 512K x 36 0.45ns 165-Pin BGA
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