參數(shù)資料
型號: UDA1350ATS
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: IEC 958 audio DAC
中文描述: SPECIALTY CONSUMER CIRCUIT, PDSO28
封裝: PLASTIC, SSOP-28
文件頁數(shù): 10/32頁
文件大小: 124K
代理商: UDA1350ATS
2000 Mar 29
10
Philips Semiconductors
Preliminary specification
IEC 958 audio DAC
UDA1350ATS
8.5.1
S
TATIC PIN CONTROL MODE
The default values for all non-pin controlled settings are identical to the default values at start-up in the L3 control mode.
Table 3
Pin description of static pin control mode
PIN
NAME
VALUE
FUNCTION
Mode selection pin
26
SELSTATIC
1
select static pin control mode; must be connected to V
DDD
Input pins
5
RESET
0
1
0
0
0
0
1
normal operation
reset
must be connected to V
SSD
must be connected to V
SSD
must be connected to V
SSD
normal operation
mute active
8
9
10
11
L3DATA
L3CLOCK
L3MODE
MUTE
Status pins
16
LOCK
0
1
clock regeneration and IEC 958 decoder out-of-lock
or
non-PCM data detected
clock regeneration and IEC 958 decoder locked
and
PCM data detected
Test pins
4
TEST1
TEST2
TEST4
TEST3
0
0
1
0
must be connected to digital ground (V
SSD
)
must be connected to digital ground (V
SSD
)
must be connected to digital supply voltage (V
DDD
)
must be connected to digital ground (V
SSD
)
18
25
28
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