參數(shù)資料
型號(hào): TWL1110GQE
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝: PLASTIC, MICRO, BGA-80
文件頁數(shù): 15/37頁
文件大小: 496K
代理商: TWL1110GQE
TWL1110
VOICE-BAND AUDIO PROCESSOR (VBAP
)
SLWS103 – NOVEMBER 2000
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
receive operation
receive channel gain control
The values in the receive PGA control registers control the gain in the receive path. PGA gain is set from
– 6 to 6 dB in 1-dB steps through the I2C interface. The default receive channel gain is – 4 dB.
Table 3. Receive PGA Gain Control
BIT NAME
RELATIVE GAIN, VOICE MODE
DTMF GAIN TONE NODE
RP3
RP2
RP1
RP0
MIN
TYP
MAX
UNIT
DTMF GAIN, TONE NODE
0
5.8
6
6.2
dB
12
0
1
4.8
5
5.2
dB
12
0
1
0
3.8
4
4.2
dB
12
0
1
2.8
3
3.2
dB
6
0
1
0
1.8
2
2.2
dB
6
0
1
0
1
0.8
1
1.2
dB
6
0
1
0
– 0.2
0
0.2
dB
0
1
–1.2
–1
– 0.8
dB
0
1
0
– 2.2
–2
–1.8
dB
0
1
0
1
– 3.2
–3
– 2.8
dB
–6
1
0
1
0
– 4.2
–4
– 3.8
dB
–6
1
0
1
– 5.2
–5
– 4.8
dB
–6
1
0
– 6.2
–6
– 5.8
dB
–12
1
0
1
X
dB
–12
1
0
X
dB
–12
sidetone gain control
The values in the sidetone PGA control registers control the sidetone gain. Sidetone gain is set from –12 dB
to – 24 dB in 2-dB steps through the I2C interface. Sidetone can be muted by setting bit 7 of the power control
register. The default sidetone gain is –12 dB.
Table 4. Sidetone Gain Control
BIT NAME
RELATIVE GAIN
ST2
ST1
ST0
MIN
TYP
MAX
UNIT
0
–12.2
–12
–11.8
dB
0
1
–14.2
–14
–13.8
dB
0
1
0
–16.2
–16
–15.8
dB
0
1
–18.2
–18
–17.8
dB
1
0
– 20.2
–20
–19.8
dB
1
0
1
– 22.2
–22
– 21.8
dB
1
0
– 24.2
–24
– 23.8
dB
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