參數(shù)資料
型號： TSC21020F-20SCHXXX
廠商： ATMEL CORP
元件分類： 數(shù)字信號處理外設(shè)
英文描述： 40-BIT, DSP-FLOATING POINT PROCESSOR, UUC
封裝： DIE
文件頁數(shù)： 33/37頁
文件大?。?/td> 483K
代理商： TSC21020F-20SCHXXX
TSC21020F
Rev. E – Oct. 05, 1998
5
Architecture Overview
Figure 1 shows a block diagram of the TSC21020F. The
processor features:
D Three Computation Units (ALU, Multiplier, and
Shifter) with a Shared Data Register File
D Two Data Address Generators (DAG 1, DAG 2)
D Program Sequencer with Instruction Cache
D 32-Bit Timer
D Memory Buses and Interface
D JTAG Test Access Port and On-Chip Emulation Support
Computation Units
The TSC21020F contains three independent computation
units :
an
ALU,
a
multiplier
with
fixed-point
accumulator, and a shifter. In order to meet a wide variety
of processing needs, the computation units process data
in three formats : 32-bit fixed-point, 32-bit floating-point
and 40-bit floating-point. The floating-point operations
are single-precision IEEE-compatible (IEEE Standard
754/854). The 32-bit floating-point format is the standard
IEEE format, whereas the 40-bit IEEE extended-
precision format has eight additional LSBs of mantissa
for greater accuracy.
The multiplier performs floating-point and fixed-point
multiplication as well as fixed-point multiply/add and
multiply/subtract operations. Integer products are 64 bits
wide, and the accumulator is 80 bits wide. The ALU
performs 45 standard arithmetic and logic operations,
supporting both fixed-point and floating-point formats.
The shifter performs 19 different operations on 32-bit
operands.
These
operations
include
logical
and
arithmetic shifts, bit manipulation, field deposit, and
extract and derive exponent operations.
The computation units perform single-cycle operations ;
there is no computation pipeline. The three units are
connected in parallel rather than serially, via multiple-bus
connections with the 10-port data register file. The output
of any computation unit may be used as the input of any
unit on the next cycle. In a multifunction computation, the
ALU and multiplier perform independent, simultaneous
operations.
Data Register File
The TSC21020F’s general-purpose data register file is
used for transferring data between the computation units
and the data buses, and for storing intermediate results.
The register file has two sets (primary and alternate) of
sixteen 40-bit registers each, for fast context switching.
Figure 1. TSC21020F Block Diagram
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