參數(shù)資料
型號(hào): TMS320VC5409PGE100
廠商: Texas Instruments
文件頁(yè)數(shù): 20/93頁(yè)
文件大?。?/td> 0K
描述: IC DIG SIG PROCESSOR 144-LQFP
標(biāo)準(zhǔn)包裝: 60
系列: TMS320C54x
類型: 定點(diǎn)
接口: 主機(jī)接口,McBSP
時(shí)鐘速率: 100MHz
非易失內(nèi)存: ROM(32 kB)
芯片上RAM: 64kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-LQFP(20x20)
包裝: 托盤(pán)
配用: 296-31413-ND - XDS560 CLASS HIGH SPEED EMULATOR
296-23043-ND - BLACKHAWK XDS560 USB EMULATOR
296-15829-ND - DSP STARTER KIT FOR TMS320C5416
其它名稱: 296-10764
296-10764-5
296-10764-5-ND
Functional Overview
27
April 1999 Revised October 2008
SPRS082F
3.2.2 On-Chip ROM With Bootloader
A bootloader is available in the standard 5409 on-chip ROM. This bootloader can be used to automatically
transfer user code from an external source to anywhere in the program memory at power up. If the MP/MC
pin is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. This
location contains a branch instruction to the start of the bootloader program. The standard 5409 bootloader
provides different ways to download the code to accommodate various system requirements:
Parallel from 8-bit or 16-bit-wide EPROM
Parallel from I/O space 8-bit or 16-bit mode
Serial boot from serial ports 8-bit or 16-bit mode
Host-port interface boot
SPI serial EEPROM 8-bit boot mode
The standard on-chip ROM layout is shown in Table 35.
Table 35. Standard On-Chip ROM Layout
ADDRESS RANGE
DESCRIPTION
0x0000h 0xBFFFh
External program space
0xC000h 0xF7FFh
Reserved
0xF800h 0xFBFFh
Bootloader
0xFC00h 0xFEFFh
Reserved
0xFF00h 0xFF7Fh
Reserved
0xFF80h 0xFFFFh
Interrupt vector table
In the VC5409 ROM, 128 words are reserved for factory device-testing purposes. Application
code to be implemented in on-chip ROM must reserve these 128 words at addresses
FF00h–FF7Fh in program space.
3.2.3 On-Chip RAM
The 5409 device contains 32K
× 16-bit of on-chip dual-access RAM (DARAM). The DARAM is composed of
four blocks of 8K words each. Each block in the DARAM can support two reads in one cycle, or a read and
a write in one cycle. The DARAM is located in the address range 0080h7FFFh in data space, and can be
mapped into program/data space by setting the OVLY bit to one.
3.2.4 On-Chip Memory Security
The 5409 features a 16K-word
× 16-bit on-chip maskable ROM.
Customers can arrange to have the ROM of the 5409 programmed with contents unique to any particular
application. A security option is available to protect a custom ROM. The ROM and ROM/RAM security options
are available on the 5409. These security options are described in the TMS320C54x DSP Reference Set,
Volume 1: CPU and Peripherals (literature number SPRU131). When the security options are enabled, JTAG
emulation is inhibited or nonfunctional.
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TMS320VC5409PGE100 制造商:Texas Instruments 功能描述:Digital Signal Processor IC
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