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參數(shù)資料
| 型號： | TMC22152AKHC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
| 中文描述： | COLOR SIGNAL DECODER, PQFP100 |
| 封裝： | MQFP-100 |
| 文件頁數(shù)： | 61/84頁 |
| 文件大?。?/td> | 417K |
| 代理商： | TMC22152AKHC |
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PRODUCT SPECIFICATION
TMC22x5yA
REV. 1.0.0 2/4/03
61
Timing Parameters
Subcarrier Programming
The color subcarrier is produced by an internal 28 bit Direct
Digital Synthesizer (DDS) which is phase locked to the burst
signal of the digitized video input. The nominal frequency is
programmed into the DDS as follows:
FREQ = (number of subcarrier cycles per line / number of
pixels per line) * 2^28
An example would be NTSC subcarrier mode
FREQ = (227.5 / 910) * 2^28 = 4000000 hex
Horizontal Timing
The horizontal video line is broken down into four horizontal
timing parameters.
STS: The number of pixels between sync pulses
STB: The number of pixels between the nominal mid point
of sync and the start of the 16 pixel burst gate. This value is
modified depending upon the mode of operation.
Table 21. Timing Offsets
BTV: The number of pixels between the start of the 16 pixel
burst gate and the nominal start of active video.
AV: The number of active pixels in the active video line.
The difference between the sum of STB+BTV+AV sub-
tracted from STS provides the nominal front porch.
Horizontal and Vertical Timing Parameters
When external horizontal and vertical syncs are provided the
timing shown in Figure 28 is required to synchronize the
internal state machines to beginning of a field (3, 5, or 7).
For field 2 (4, 6, or 8) the falling edge of VSYNC must occur
at least 2 clock periods but not more than (H-2) clock periods
after the falling edge of HSYNC, where H is the total num-
ber of pixels in an active video line.
260 & 261
262
263 - 307
308
309
310
311
312
10
11
12
13
14
15
16
17
Table 20. Table of Line Idents, LID[4:0]
(cont.)
Line no:
LID
4-0
Standard
x
x
x
PAL
NTSC
x
Mode
Genlock
Line locked
Subcarrier
D2 mode
D2 mode
D1 mode
Offset required
-8
-8
-22
-12
-8
+12
Figure 27. Horizontal Timing
STB
AV
65-22x5y-68
STS
BTV
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC22153 | 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
| TMC22153AKHC | 功能描述:視頻 IC Dig Video Decoder Multistandard RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22191 | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Digital Video Encoders/Layering Engine |
| TMC22191KHC | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22191R0C | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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