參數(shù)資料
型號(hào)： TMC22152AKHC
廠商： FAIRCHILD SEMICONDUCTOR CORP
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
中文描述： COLOR SIGNAL DECODER, PQFP100
封裝： MQFP-100
文件頁(yè)數(shù)： 33/84頁(yè)
文件大小： 417K
代理商： TMC22152AKHC
PRODUCT SPECIFICATION
TMC22x5yA
REV. 1.0.0 2/4/03
33
Control Register De
fi
nitions
(continued)
Video Measurement (30)
7
6
5
4
3
2
1
0
Reserved
LGF
LGEN
LGEXT
RESERVED
PGG
PGEN
PGEXT
Reg
30
30
Bit
7
6
Name
Reserved
LGF
Description
Reserved, set to zero.
Line grab flag.
Set HIGH when the decoder has grabbed a line, and must be
reset LOW before another line can be grabbed.
Line grab enable.
When HIGH, the line grabber is used to freeze the
contents of the line store, at the programmed line and field count. The phase
and frequency of the frozen line are also stored from the DRS, and are
continually used to reset the DDS, once per line, until LGF is set LOW. When
LGEN is LOW, the line freeze is disabled, the internal loops operate normally,
and the line grab signal is used only to gate the pixel grab.
Ext line grab enable.
The SET pin is used to produce the line grabber pulse
when HIGH and the internal line decode is used when LGEXT is LOW.
Reserved, set to zero.
Pixel grab gate.
When HIGH the pixel grab is gated by the field and line grab
signals to enable one pixel per four fields in NTSC and 8 field in PAL to be
grabbed. This function is disabled if PGEN is set LOW.
Pixel grab enable.
When HIGH the 10 bit G/Y, B/U, and R/V data, and the
mixed sync and luma data after the comb filter, and the demodulated (B-Y)
and (R-Y) color difference signals are grabbed once every line at the
programmed pixel grab number. When LOW the contents of the pixel grab
registers are held and the pixel grab pulse is ignored.
Ext pixel grab enable.
The SET pin is used to produce the pixel grab pulse
when HIGH and the internal pixel decode is used when PGEXT is LOW.
30
5
LGEN
30
4
LGEXT
30
30
3
2
Reserved
PGG
30
1
PGEN
30
0
PGEXT
Video Measurement (31)
7
6
5
4
3
2
1
0
PG
7
PG
6
PG
5
PG
4
PG
3
PG
2
PG
1
PG
0
Reg
31
Bit
7-0
Name
PG
7-0
Description
Pixel grab, 8 lsbs.
Bottom 8 bits of the pixel grab.
Video Measurement (32)
7
6
5
4
3
2
1
0
LG
7
LG
6
LG
5
LG
4
LG
3
LG
2
LG
1
LG
0
Reg
32
Bit
7-0
Name
LG
7-0
Description
Line grab, 8 lsbs.
Bottom 8 bits of the line grab.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMC22153 制造商:FAIRCHILD 制造商全稱:Fairchild Semiconductor 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit
TMC22153AKHC 功能描述:視頻 IC Dig Video Decoder Multistandard RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TMC22191 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Digital Video Encoders/Layering Engine
TMC22191KHC 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
TMC22191R0C 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
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