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參數(shù)資料
| 型號： | TMC22091KHC |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 顏色信號轉(zhuǎn)換 |
| 英文描述： | Digital Video Encoders/Layering Engine |
| 中文描述： | COLOR SIGNAL ENCODER, PQFP100 |
| 封裝： | 3.20 MM HEIGHT, MQFP-100 |
| 文件頁數(shù)： | 14/60頁 |
| 文件大?。?/td> | 293K |
| 代理商： | TMC22091KHC |
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TMC22091/TMC22191
PRODUCT SPECIFICATION
14
Control Register Definitions
(continued)
Format Control Register (01)
7
6
5
4
3
2
1
0
Reserved
LCREN
RAMPEN
CB
FORMAT
INMODE
Reg
01
01
Bit
7
6
Name
Function
Reserved.
(TMC22191) Layering Control Register enable. When LOW, the Layering
Control Register is not available and Key Control Register functions are
enabled. In this mode, the TMC22191 functions like the TMC22091. When
HIGH, the Layering Control Register takes the place of the Key Control
Register and enables the layering functions. Data loaded into the Key or
Layering Control Registers will remain but have a different meaning if this bit is
changed.
Modulated ramp test. When LOW (normal), the TMC22x91 encodes and
outputs video corresponding to input data. When RAMPEN and CB are both
HIGH, an internally generated 40 IRE modulated ramp is produced, preempting
input data.
Color bar test. When HIGH (normal), the TMC22x91 encodes and outputs
video corresponding to input data. When CB, RAMPEN, and Format Control
Register bit 0 are LOW, internally generated color bars are produced,
preempting input data.
PD
23-0
input format select. Two bits select RGB, GBR, or YC
B
C
R
input data.
When bits 3 and 2 are:
LCREN
01
5
RAMPEN
01
4
CB
01
3-2
FORMAT
0 0 the CLUT output is interpreted as RGB and is converted to YC
B
C
R
.
0 1 is reserved. Bits 3 and 2 must be 00 or 10 when the Layering Control
Register is enabled (TMC22191).
1 0 the CLUT output is interpreted as GBR, and is converted to YC
B
C
R
.
1 1 the CLUT output is interpreted as YC
B
C
R
.
PD
23-0
input mode select. These two bits set up the TMC22x91 for either 444,
422, 15-bit, or 8-bit input modes.
01
1-0
INMODE
0 0 24-bit/pixel GBR, RGB, or YC
B
C
R
444 data enters from PD
23-0
0 1 YC
B
C
R
422 data enters from PD
23-8
; C
R
and C
B
alternate from PD
15-8
1 0 15-bit/pixel GBR or RGB data from PD
14-0
1 1 8-bit/pixel color indexed data enters from PD
7-0
.
Bits 1 and 0 must be 00, 01, or 11 when the Layering Control Register is
enabled (TMC22191).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMC22191KHC | Digital Video Encoders/Layering Engine |
| TMC22091R0C | Digital Video Encoders/Layering Engine |
| TMC22191R0C | Digital Video Encoders/Layering Engine |
| TMC22091 | Digital Video Encoders(數(shù)字視頻編碼器) |
| TMC22191 | Digital Video Encoders(數(shù)字視頻編碼器) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMC22091R0C | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22091R0CT | 功能描述:視頻 IC D/V Encoder Layering Engine RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TMC22091ROC-T | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| TMC22151AKHC | 制造商:CADEKA 制造商全稱:CADEKA 功能描述:Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit |
| TMC22151KHC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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