參數(shù)資料
型號: THS4215DGNRG4
廠商: Texas Instruments, Inc.
英文描述: LOW-DISTORTION HIGH-SPEED VOLTAGE FEEDBACK AMPLIFIER
中文描述: 低失真高速電壓反饋型放大器
文件頁數(shù): 22/41頁
文件大?。?/td> 1591K
代理商: THS4215DGNRG4
www.ti.com
392
_
+
THS4211
49.9
100
392
100
+5 V
-5 V
14-Bit,
400 MSps
DAC5675
RF
LO
196
392
392
3.3 V
3.3 V
+
THS4211
50
Source
392
_
+
-5 V
196
15 pF
392
196
24.9
15 pF
14-Bit, 62 Msps
ADS5422
(1:4
)
1:2
5 V
24.9
THS4211
V
CM
V
CM
392
_
+
49.9
100
100
14-Bit,
400 MSps
DAC5675
3.3 V
3.3 V
C
F
1 nF
392
49.9
1 nF
1 nF
C
F
392
392
_
+
THS4211
THS4211
RF
(out)
IF+
IF-
100
1 nF
+
THS4211
392
ADS807
12-Bit,
53 Msps
IN
R
f
+5 V
392
49.9
V
I
R
g
-5 V
50
Source
R
ISO
0.1
μ
F
16.5
68 pf
0.1
μ
F
IN
CM
1.82 k
R
T
NOTE: For best performance, high-speed ADCs should be driven
differentially. See the THS4500 family of devices for more
information.
Active Filtering With the THS4211
Using the THS4211 as a DAC Output Buffer
THS4211
THS4215
SLOS400D–SEPTEMBER 2002–REVISED NOVEMBER 2004
converter. The first circuit performs a differential to
single-ended conversion with the THS4211 con-
figured as a difference amplifier. The difference
amplifier can double as the termination mechanism
for the DAC outputs as well.
Figure 80. Differential to Single-Ended
Conversion of a High-Speed DAC Output
Figure 78. A Linear, Low Noise, High Gain
ADC Preamplifier
For cases where a differential signaling path is
desirable, a pair of THS4211 amplifiers can be used
as output buffers. The circuit depicts differential drive
into a mixer's IF inputs, coupled with additional signal
gain and filtering.
The second circuit depicts single-ended ADC drive.
While not recommended for optimum performance
using converters with differential inputs, satisfactory
performance
can
sometimes
single-ended input drive. An example circuit is shown
here for reference.
be
achieved
with
Figure 81. Differential Mixer Drive Circuit
Using the DAC5675 and the THS4211
Figure 79. Driving an ADC With a
Single-Ended Input
High-frequency active filtering with the THS4211 is
achievable due to the amplifier's high slew-rate, wide
bandwidth, and voltage feedback architecture. Sev-
eral options are available for high-pass, low-pass,
bandpass, and bandstop filters of varying orders. A
simple two-pole low pass filter is presented here as
an example, with two poles at 100 MHz.
Two example circuits are presented here showing the
THS4211 buffering the output of a digital-to-analog
22
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