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參數(shù)資料
| 型號(hào)： | THC63LVD104S |
| 廠商： | THine Electronics, Inc. |
| 英文描述： | 112MHz 30Bits Color LVDS Receiver |
| 中文描述： | 112MHz的30Bits顏色LVDS接收器 |
| 文件頁數(shù)： | 7/12頁 |
| 文件大?。?/td> | 154K |
| 代理商： | THC63LVD104S |
Copyright 2004 THine Electronics, Inc. All rights reserved 7
THine Electronics, Inc.
THC63LVD104S Rev.1.0
Switching Characteristics
V
CC
=VCC=PVCC=LVCC
Symbol
Parameter
CLKOUT Period
Min.
Typ.
Max.
Units
t
RCP
(Fig4)
8.93
T
125.0
ns
t
RCH
CLKOUT High Time
(Fig4)
ns
t
RCL
CLKOUT Low Time
(Fig4)
ns
t
RS
t
RH
TTL Data Setup to CLKOUT
0.50t
RCP
-1.5
0.35t
RCP
-1.0
ns
TTL Data Hold to CLKOUT
ns
t
TLH
TTL Low to High Transition Time
(Fig 3)
1.3
3.0
ns
t
THL
TTL High to Low Transition Time
(Fig 3)
1.3
3.0
ns
t
SK
Receiver Skew
Margin
(Fig6)
t
RCIP
=85MHz
-400
0
400
ps
t
RCIP
=112MHz
-350
0
350
ps
t
RIP1
Input Data Position0
(Fig6)
-t
SK
0
+t
SK
ns
t
RIP0
Input Data Position1
(Fig6)
ns
t
RIP6
Input Data Position2
(Fig6)
ns
t
RIP5
Input Data Position3
(Fig6)
ns
t
RIP4
Input Data Position4
(Fig6)
ns
t
RIP3
Input Data Position5
(Fig6)
ns
t
RIP2
Input Data Position6
(Fig6)
ns
t
RPLL
Phase Lock Loop Set
(Fig7)
10.0
ms
t
RCD
RCLK +/- to
CLK OUT Delay
(Fig8)
t
RCIP
=75MHz
45.5
48.5
ns
t
RCIP
CLKIN Period
(Fig6)
8.93
125.0
ns
T
2
---
T
2
---
t
7
------------
t
SK
–
t
7
------------
t
7
------------
t
SK
+
2t
------------
7
t
SK
–
2t
------------
7
2t
------------
7
t
SK
+
3t
------------
7
t
SK
–
3t
------------
7
3t
------------
7
t
SK
+
4t
------------
7
t
SK
–
4t
------------
7
4t
------------
7
t
SK
+
5t
------------
7
t
SK
–
5t
------------
7
5t
------------
7
t
SK
+
6t
------------
7
t
SK
–
6t
------------
7
6t
------------
7
t
SK
+
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