參數(shù)資料
型號(hào): TEA5766UK
廠(chǎng)商: ST-ERICSSON
元件分類(lèi): 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封裝: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件頁(yè)數(shù): 36/60頁(yè)
文件大小: 298K
代理商: TEA5766UK
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
40 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
Table 20.
LH - RSSI level hysteresis
RSSI ADC search stop level
RSSI hysteresis threshold level
LHSW = 0
LHSW = 1
3 (SNR = 40 dBA)
0 (SNR = 0 dBA)
5 (SNR = 46 dBA)
2 (SNR = 37 dBA)
1 (SNR = 34 dBA)
7 (SNR = 52 dBA)
4 (SNR = 49 dBA)
3 (SNR = 40 dBA)
10 (maximum SNR and maximum
channel separation)
7 (SNR = 52 dBA)
5 (SNR = 46 dBA)
Table 21.
Test bits
Test conditions: Tamb =25 °C, f = 75 kHz including 9 % pilot, R = L, fmod = 1 kHz,
de-emphasis = 50
s, MST = 0, SNC = 1, IEC lter (200 Hz to 15 kHz), A-weighting lter.
TB3
TB2
TB1
TB0
Output signal
Pin
Bit TM
0000
bit SWP of byte 4W, depending on bits
SWPM and SWP or FRRFLAG
SWPORT 0 or 1
0001
oscillator output 32.768 kHz
SWPORT 1
0010lock detect bit LD
SWPORT 1
0011
pilot detected signal
SWPORT 1
0100
programmable divider
SWPORT 1
0101
INTX output equal to INTCTRL; pin
SWPORT = LOW
INTX
1
01103.8 MHz clock
SWPORT 1
Table 22.
RDSR1 - SPI address 08 or I2C byte 12R + byte 13R
Bit
Symbol
Access
Reset
value
Description
SPI
I2C
15
7
-
not used
14 to 12
6 to 4
BLID[2:0]
R
-
block ID of last block
000=A
001=B
010=C
011=D
100=C’
101=E
110 = invalid block E (RBDS)
111 = invalid block
11 and 10
3 and 2
-
not used
09 and 08
1 and 0
ELB[1:0]
R
-
number of errors for last processed block
00 = no errors
01 = maximum 2 bits
10 = maximum 5 bits
11 = uncorrectable
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