參數(shù)資料
型號: TEA5766UK
廠商: ST-ERICSSON
元件分類: 接收器
英文描述: FM, AUDIO SINGLE CHIP RECEIVER, PBGA25
封裝: 3.30 X 3.25 MM, 0.60 MM HEIGHT, WLCSP-25
文件頁數(shù): 25/60頁
文件大?。?/td> 298K
代理商: TEA5766UK
TEA5766UK_1
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 01 — 22 March 2007
30 of 59
NXP Semiconductors
TEA5766UK
Stereo FM radio + RDS
9.6 Error detection and reporting
The TEA5766UK must report information on the number of errors corrected in the last and
previously decoded blocks. This is reported in the ELB[1:0] and EPB[1:0] elds as shown
During synchronization search the error correction is disabled for detection of the rst
block and is enabled for processing of the second block according to the mode set by the
SYM[1:0] bits as described in Table 26.
9.7 RDS data - reading from registers
To read RDS data the microprocessor must read byte 12R to byte 19R. All 8 bytes must
be read to reset the status bytes byte 12R and byte 13R, i.e. effectively the status bits can
be updated by the decoder after reading the last bit of byte 19R. The DOVL bit is cleared
after reading the last bit of byte 19R and the status of the SYNC bit does not depend on
reading the register; the SYNC bit tells if the decoder is synchronized or not. When
starting a read action from byte 12R, the decoder blocks update from the RDS bytes until
byte 19R has been read. RDS byte 12R to byte 19R must be read in one read action.
10. Control interface
10.1 Selection between I2C-bus and SPI-bus
The TEA5766UK supports the I2C-bus and the 3-wire SPI-bus. With pin ISS the bus types
can be selected according to Table 9.
Table 9.
Bus type selection
Pin ISS
Bus
LOW
I2C-bus
HIGH
SPI 3-wire
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