參數(shù)資料
型號(hào)： TC6387XB
廠商： Toshiba Corporation
英文描述： SD Memory Card / SDIO Card Controller
中文描述： SD卡/ SDIO卡控制器
文件頁(yè)數(shù)： 19/62頁(yè)
文件大?。?/td> 1406K
代理商： TC6387XB
TC6387XB Specification
Rev. 1.0 02/02/06
TOTAL
62
PAGE NO.19
TOSHIBA CONFIDENTIAL
+De-asserting Method
SD memory Card
(1) "0" is written into the SBWE bit(D9) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MBWE bit(D25) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
SDIO Card
(1) "0" is written into the SBWE bit(D9) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(2) "1" is written into the MBWE bit(D25) of SD Interrupt Mask Register(Offset:120-123h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
4.5.4 Buffer read enable interrupt
+ Interrupt Assert Condition
When one block of data from the card is stored fully into the internal buffer for a read command, an interrupt is
generated.
+ Factor Evaluation Method
In the case of SD memory Card, the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:01E-
01Fh) is set to "1". In the case of SDIO Card, the SBRE bit(D8) of SD Buffer Control & Error Status
Register(Offset:11E-11Fh) is set to "1".
+De-asserting Method
SD memory Card
(1) "0" is written into the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:01E-01Fh).
(2) "1" is written into the MBRE bit(D24) of SD Interrupt Mask Register(Offset:020-023h).
(3) Hardware reset by #PCLR = “0”.
(4) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:0E0h).
SDIO Card
(5) "0" is written into the SBRE bit(D8) of SD Buffer Control & Error Status Register(Offset:11E-11Fh).
(6) "1" is written into the MBRE bit(D24) of SD Interrupt Mask Register(Offset:120-123h).
(7) Hardware reset by #PCLR = “0”.
(8) Software reset by writing "0" into the SRST bit(D0) of SD Software Reset Register(Offset:1E0h).
HCLK
SDCLK
SDCD3-0
#HINT
Read Data
CRC16
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