參數(shù)資料
型號: TAS5028PAGRG4
廠商: Texas Instruments, Inc.
英文描述: 8 Channel Digital Audio PWM Processor
中文描述: 8通道數(shù)字音頻PWM處理器
文件頁數(shù): 63/84頁
文件大?。?/td> 1051K
代理商: TAS5028PAGRG4
Serial Control Interface Register Definitions
55
SLES112 — June 2004
TAS5028
6.7
Headphone Configuration Control Register (0x0D)
Bit D0 is
Don’t Care
.
Table 6-7. Headphone Configuration Control Register
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
-
-
-
-
-
-
Disable backend reset sequence for a channel - BEErrorRecEn
1
-
-
-
-
-
-
Enable backend reset sequence for a channel
-
0
-
-
-
-
-
Valid does not have to be low for this channel to be reset BEValidRst
-
1
-
-
-
-
-
Valid must be low for this channel to be reset
-
-
0
-
-
-
-
Valid does not have to be low for this channel to be muted BEValidMute
-
-
1
-
-
-
-
Valid must be low for this channel to be muted
-
-
-
0
-
-
-
Normal BEPolarity
-
-
-
1
-
-
-
Switches PWM+ and PWM- and invert audio signal
-
-
-
-
0
-
-
Do not remap output to comply with 5182 interface
-
-
-
-
1
-
-
Remap output to comply with 5182 interface
-
-
-
-
-
0
-
Do not go to low low in mute - BELowMute
-
-
-
-
-
1
-
Go to low-low in Mute
-
-
-
-
-
-
0
Do not remap Hi-Z state to low-low state - BE5111BsMute
-
-
-
-
-
-
1
Remap Hi-Z state to low-low state
6.8
Nine serial modes can be programmed I
2
C.
Serial Data Interface Control Register (0x0E)
Table 6-8. Serial Data Interface Control Register Format
RECEIVE SERIAL DATA
INTERFACE FORMAT
WORD LENGTHS
D7-D4
D3
D2
D1
D0
Right justified
16
0000
0
0
0
0
Right justified
20
0000
0
0
0
1
Right justified
I
2
S
I
2
S
I
2
S
24
0000
0
0
1
0
16
0000
0
0
1
1
20
0000
0
1
0
0
24
0000
0
1
0
1
Left justified
16
0000
0
1
1
0
Left justified
20
0000
0
1
1
1
Left justified
24
0000
1
0
0
0
Illegal
0000
1
0
0
1
Illegal
0000
1
0
1
0
Illegal
0000
1
0
1
1
Illegal
0000
1
1
0
0
Illegal
0000
1
1
0
1
Illegal
0000
1
1
1
0
Illegal
0000
1
1
1
1
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