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Digital-to-Analog Converter
Appendix A
STDL130
A-3
Samsung ASIC
13. DNL (Differential Non Linearity)
- Any two adjacent digital codes should re-
sult in measured output values that are exactly 1LSB apart (2
n
of full scale for an
n-bit converter). Any deviation of the measured "step" from the ideal difference is
called differential linearity error expressed in multiplies of 1LSB. It is an important
specification because a differential linearity error greater than 1LSB can lead to
non-monotonic response in a DAC and missed codes in an ADC.
14. Monotonic
- A DAC is said to be monotonic if the output either increases or
remains constant as the digital input increases with the result that the output will
always be a single-valued function of the input. The specification "monotonic"
(over a given temperature range) is sometimes substituted for a differential
nonlinearity specification since differential nonlinearity less than 1LSB is a suffi-
cient condition for monotonic behaviour.
2. Analog-to-Digital Converter
1. INL (Integral Non Linearity)
- Integral nonlinearity refers to the deviation of
each individual code from a line drawn from "zero" through "full scale". The point
used as "zero" occurs for an analog value 1/2LSB before the first code transition.
"Full scale" is defined as a level 1/2LSB beyond the last code transition. The
deviation is measured from the center of each particular code to the true straight
line.
2. DNL (Differential Non Linearity)
- An ideal ADC exhibits code transitions that
are exactly 1LSB apart. DNL is the deviation from this ideal value. It is often
specified in terms of the resolution for which no missing codes are guaranteed.
3. Offset Error
- The first transition should occur at a level "zero". Offset is
defined as the deviation of the actual first code transition from that point.
4. Gain Error
- The first code transition should occur for an analog value of
nominal negative full scale. The last transition should occur for an analog value
1LSBbelowthenominalpositivefullscale.Gainerroristhedeviationoftheactual
differencebetweenfirstandlastcodetransitionsandtheidealdifferencebetween
the first and last code transitions.
5. Pipeline Delay (Latency)
- The number of clock cycles between conversion
initiation and the associated output data being made available. New output data
is provided every clock cycle.
6. Effective Number of Bits (ENOB)
- This is a measure of a device's dynamic
performance and may be obtained from the SNDR or from a sine wave curve test
fit according to the following expression:
ENOB = SNDR - 1.76/6.02
ENOB = N-log2[RMS error (actual) / RMS error (ideal)]
7. Analog Bandwidth
- The analog input frequency at which the spectral power
of the fundamental frequency, as determined by FFT analysis is reduced by 3dB.
8. Aperture Delay
- The delay between the sampling clock and the instant the
analog input signal is sampled.
9. Aperture Jitter
- The sample to sample variation in aperture delay.