參數(shù)資料
型號： ST92186B
英文描述： 8/16-BIT MCU FOR TV APPLICATIONS WITH UP TO 32K ROM AND ENHANCED ON-SCREEN-DISPLAY
中文描述： 16位產(chǎn)品的電視控制器的32K ROM的和更豐富的應用，屏幕顯示
文件頁數(shù)： 79/230頁
文件大?。?/td> 2743K
代理商： ST92186B
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁當前第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁
79/230
ST92163 - RESET AND CLOCK CONTROL UNIT (RCCU)
CLOCK MANAGEMENT
(Cont’d)
5.3.4 Low Power Modes
The user can select an automatic slowdown of
clock frequency during Wait for Interrupt opera-
tion, thus idling in low power mode while waiting
for an interrupt. In WFI operation the clock to the
CPU core (CPUCLK) is stopped, thus suspending
program execution, while the clock to the peripher-
als (INTCLK) may be programmed as described in
the following paragraphs. An example of Low
Power operation in WFI is illustrated in
Figure 38
.
If low power operation during WFI is disabled
(LPOWFI bit = 0 in the CLKCTL Register), the
CPU CLK is stopped but INTCLK is unchanged.
If low power operation during Wait for Interrupt is
enabled (LPOWFI bit = 1 in the CLKCTL Register),
as soon as the CPU executes the WFI instruction,
the PLL is turned off and the system clock will be
forced to CLOCK2 divided by 16, or to CK_AF, if
this has been selected by setting WFI_CKSEL,
and providing CKAF_ST is set, thus indicating that
the internal RC oscillator is selected.
If the external clock source is used, the crystal os-
cillator may be stopped by setting the XTSTOP bit,
providing that the CK_AK clock is present and se-
lected, indicated by CKAF_ST being set. The crys-
tal oscillator will be stopped automatically on en-
tering WFI if the WFI_CKSEL bit has been set. It
should be noted that selecting a non-existent
CK_AF clock source is impossible, since such a
selection requires that the auxiliary clock source
be actually present and selected. In no event can
a non-existent clock source be selected inadvert-
ently.
It is up to the user program to switch back to a fast-
er clock on the occurrence of an interrupt, taking
care to respect the oscillator and PLL stabilisation
delays, as appropriate.It should be noted that any
of the low power modes may also be selected ex-
plicitly by the user program even when not in Wait
for Interrupt mode, by setting the appropriate bits.
5.3.5 Interrupt Generation
System clock selection modifies the CLKCTL and
CLK_FLAG registers.
The clock control unit generates an external inter-
rupt request when CK_AF and CLOCK2/16 are
selected or deselected as system clock source, as
well as when the system clock restarts after a
hardware stop (when the STOP MODE feature is
available on the specific device). This interrupt can
be masked by resetting the INT_SEL bit in the
CLKCTL register. In the RCCU the interrupt is
generated with a high to low transition (see inter-
rupt and DMA chapters for further information).
Table 13. Summary of Operating Modes using main Crystal Controlled Oscillator
MODE
INTCLK
XTAL/2
x (14/D)
XTAL/2
x (10/D)
XTAL/2
x (8/D)
XTAL/2
x (6/D)
XTAL/2
XTAL/32
CPUCLK
DIV2
PRS0-2
CSU_CKSEL
MX0-1
DX2-0
LPOWFI
XT_DIV16
PLL x BY 14
INTCLK/N
1
N-1
1
1 0
D-1
X
1
PLL x BY 10
INTCLK/N
1
N-1
1
0 0
D-1
X
1
PLL x BY 8
INTCLK/N
1
N-1
1
1 1
D-1
X
1
PLL x BY 6
INTCLK/N
1
N-1
1
0 1
D-1
X
1
SLOW 1
SLOW 2
WAIT FOR
INTERRUPT
LOW POWER
WAIT FOR
INTERRUPT
RESET
INTCLK/N
INTCLK/N
1
1
N-1
N-1
X
X
X
X
111
X
X
X
1
0
If LPOWFI=0, no changes occur on INTCLK, but CPUCLK is stopped anyway.
XTAL/32
STOP
1
X
X
X
X
1
1
XTAL/2
INTCLK
1
0
0
00
111
0
1
相關(guān)PDF資料
PDF描述
ST92T163N4B1L 8/16-BIT FULL SPEED USB MCU FOR COMPOSITE DEVICES WITH 16 ENDPOINTS. 20K ROM. 2K RAM. I 2 C. SCI. & MFT
ST92E195 48-96 KBYTE ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER
ST92F120JV1 8/16-BIT FLASH MCU FAMILY WITH RAM. EEPROM AND J1850 BLPD
ST92F120JV9 8/16-BIT FLASH MCU FAMILY WITH RAM. EEPROM AND J1850 BLPD
ST92F120V1 8/16-BIT FLASH MCU FAMILY WITH RAM. EEPROM AND J1850 BLPD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ST92195 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
ST92195B 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
ST92195B1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
ST92195B1B1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
ST92195B1T1 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*