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參數(shù)資料
| 型號： | ST92186B |
| 英文描述： | 8/16-BIT MCU FOR TV APPLICATIONS WITH UP TO 32K ROM AND ENHANCED ON-SCREEN-DISPLAY |
| 中文描述： | 16位產(chǎn)品的電視控制器的32K ROM的和更豐富的應(yīng)用，屏幕顯示 |
| 文件頁數(shù)： | 75/230頁 |
| 文件大?。?/td> | 2743K |
| 代理商： | ST92186B |
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ST92163 - RESET AND CLOCK CONTROL UNIT (RCCU)
5 RESET AND CLOCK CONTROL UNIT (RCCU)
5.1 INTRODUCTION
The Reset and Clock Control Unit (RCCU) com-
prises two distinct sections:
– the Clock Control Unit, which generates and
manages the internal clock signals.
– the Reset/Stop Manager, which detects and
flags Hardware, Software and Watchdog gener-
ated resets.
Note:
To use the ST92163 with USB interface, the
RCCU must be configured as shown in
Figure 35
.
The external oscillator frequency must be 8 MHz.
Other configurations must not be used.
On ST9 devices where the external Stop pin is
available, this circuit also detects and manages
the externally triggered Stop mode, during which
all oscillators are frozen in order to achieve the
lowest possible power consumption.
5.2 CLOCK CONTROL UNIT
The Clock Control Unit generates the internal
clocks for the CPU core (CPUCLK) and for the on-
chip peripherals (INTCLK). The Clock Control Unit
may be driven by an external crystal circuit, con-
nected to the OSCIN and OSCOUT pins, or by an
external pulse generator, connected to OSCIN
(see
Figure 42
and
Figure 44
). Another clock
source named CK_AF can be provided from the
internal RC oscillator.
5.2.1 Clock Control Unit Overview
As shown in
Figure 34
, a programmable divider
can divide the CLOCK1 input clock signal by two.
The resulting signal, CLOCK2, is the reference in-
put clock to the programmable Phase Locked
Loop frequency multiplier, which is capable of mul-
tiplying the clock frequency by a factor of 6, 8, 10
or 14; the multiplied clock is then divided by a pro-
grammable divider, by a factor of 1 to 7. By this
means, the ST9 can operate with cheaper, medi-
um frequency (3-5 MHz) crystals, while still provid-
ing a high frequency internal clock for maximum
system performance; the range of available multi-
plication and division factors allow a great number
of operating clock frequencies to be derived from a
single crystal frequency. The undivided PLL clock
is also available for special purposes (high-speed
peripheral).
For low power operation, especially in Wait for In-
terrupt mode, the Clock Multiplier unit may be
turned off, whereupon the output clock signal may
be programmed as CLOCK2 divided by 16. For
further power reduction, an internal RC oscillator
with a frequency of 85KHZ (+/- 40%) is available to
provide the CK_AF clock internally if the external
clock source is not used. During the execution of a
WFI in Low Power mode this clock is further divid-
ed by 16 to reduce power consumption (for the se-
lection of this signal refer to the description the
CK_AF clock source in the following sections).
The internal system clock, INTCLK, is routed to all
on-chip peripherals, as well as to the programma-
ble Clock Prescaler Unit which generates the clock
for the CPU core (CPUCLK).
The Clock Prescaler is programmable and can
slow the CPU clock by a factor of up to 8, allowing
the programmer to reduce CPU processing speed,
and thus power consumption, while maintaining a
high speed clock to the peripherals. This is partic-
ularly useful when little actual processing is being
done by the CPU and the peripherals are doing
most of the work.
Figure 34. Clock Control Unit Simplified Block Diagram
Quartz
oscillator
1/16
1/2
CLOCK2
CLOCK1
CK_AF
PLL
Clock Multiplier
/Divider
CPU Clock
Prescaler
to
CPU Core
to
Peripherals
CPUCLK
INTCLK
Unit
1/16
RC
oscillator
Internal
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| ST92195 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
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| ST92195B1B1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
| ST92195B1T1 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32-64K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY AND TELETEXT DATA SLICER |
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