參數(shù)資料
型號: ST16C654CJ68
廠商: EXAR CORP
元件分類: 微控制器/微處理器
英文描述: 2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
中文描述: 4 CHANNEL(S), 1.5M bps, SERIAL COMM CONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁數(shù): 7/51頁
文件大?。?/td> 968K
代理商: ST16C654CJ68
ST16C654/654D
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
REV. 5.0.0
7
Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain.
RIA#
RIB#
RIC#
RID#
63
19
30
50
8
28
42
62
98
33
48
84
I
UART channels A-D Ring-Indicator (active low) or general purpose
input.
!
0
'
ANCILLARY SIGNALS
XTAL1
25
35
40
I
Crystal or external clock input.
XTAL2
26
36
41
O
Crystal or buffered clock output.
16/68#
-
31
36
I
Intel or Motorola Bus Select (input with internal pull-up).
When 16/68# pin is at logic 1, 16 or Intel Mode, the device will oper-
ate in the Intel bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will
operate in the Motorola bus type of interface.
Motorola bus interface is not available on the 64 pin package.
CLKSEL
21
30
35
I
Baud-Rate-Generator Input Clock Prescaler Select for channels A-
D. This input is only sampled during power up or a reset. Connect to
VCC for divide by 1 (default) and GND for divide by 4. MCR[7] can
override the state of this pin following a reset or initialization. See
MCR bit-7 and
Figure 6
in the Baud Rate Generator section.
CHCCLK
-
-
42
I
This input provides the clock for UART channel C. An external 16X
baud clock or the crystal oscillator’s output, XTAL2, must be con-
nected to this pin for normal operation. This input may also be used
with MIDI (Musical Instrument Digital Interface) applications when
an external MIDI clock is provided. This pin is only available in the
100-pin QFP package.
RESET
(RESET#)
27
37
43
I
When 16/68# pin is at logic 1 for Intel bus interface, this input
becomes the
$
%
! " !
!!
!
' !! ! ! "+
!!
$
! ".
% 2 ".3.45
+
5 $ !%
(
!!+
!
# ! !! !
Motorola bus interface is not available on the 64 pin package.
+ 1#
!! (
! #
!
" !+ 1#
!
VCC
4, 35, 52
13, 47,
64
10, 61,
86
Pwr
2.97V to 5.5V power supply. The inputs are not 5V tolerant when
operating at 3.3V.
GND
14, 28,
45, 61
6, 23, 40,
57
20, 46,
71, 96
Pwr
Power supply common, ground.
N.C.
-
-
1- 4, 26-
28, 29,
30, 51-
55, 77,
78, 79,
80
No Connection. These pins are not used in either the Intel or Motor-
ola bus modes. These pins are open, but typically, should be con-
nected to GND for good design practice.
Pin Description
N
AME
64-TQFP
P
IN
#
68-PLCC
P
IN
#
100-QFP
P
IN
#
T
YPE
D
ESCRIPTION
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