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參數(shù)資料
| 型號： | SPAK302PV16VC |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP144 |
| 封裝： | 20 X 20 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, PLASITC, LQFP-144 |
| 文件頁數(shù)： | 110/128頁 |
| 文件大?。?/td> | 641K |
| 代理商： | SPAK302PV16VC |
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Applications
MOTOROLA
MC68EN302 REFERENCE MANUAL
6-3
AR_CNTRL = $7000
HASH_EN = 0 (all 64 entries used for “match” mode)
INDEX_EN = 1 (enables hardware to write “Reason” and “ARIndex” fields into the
receive BD.
MULT1–MULT0 = 11 (reject multicast and broadcast frames).
Place the frame to be looped internally into memory. Entire frame should be in a single
buffer. Allocate receive buffer memory to receive same frame plus 4 CRC bytes.
Initialize CAM (arbitrarily select 1 of 64 entries to contain the DA of the frame to be
transmitted). CAM is in perfect match mode. CAM starts at MOBA + $A00.
Write $FF_FF_FF into all CAM entries except 1
Write DA of transmit frame into remaining entry
Initialize buffer descriptors. A good practice would be to initialize all locations to $0000
before putting in any specific values.
MOBA + C48 = $0000 (clear E bit in second receive BD)
MOBA + C46 = $LLLL (A15–A0 pointer to receive buffer)
MOBA + C44 = $00HH (A23–A16 pointer to receive buffer)
MOBA + C40 = $8000 (set E bit in first receive BD)
MOBA + C08 = $0000 (clear R bit in second transmit BD)
MOBA + C06 = $LLLL (A15–A0 pointer to transmit buffer)
MOBA + C04 = $00HH (A23–A16 pointer to transmit buffer)
MOBA + C02 = $0NNN (transmit buffer length)
MOBA + C00 = $8C00 (single buffer frame, hardware appends CRC)
ECNTRL = $0003 (assert ETHER_EN to the Ethernet Controller, this will cause the
buffer descriptor and DMA state machines to start operation)
Frame loopback should occur under hardware control. The TFINT and RFINT interrupts
should occur. Once these interrupts have occurred, frame loopback can be verified by
the following:
— Receive buffer should contain frame transmitted plus 4 byte CRC
— Transmit buffer descriptor should contain the following:
MOBA + C00 = 0C00
MOBA + C02, C04, C06 locations should be unchanged
— Receive buffer descriptor should contain the following:
MOBA + C40 = $0C00
MOBA + C42 = value in (MOBA + C02) + 4
MOBA + C44, C46 locations should be unchanged
6.2 MOVING A QUICC ETHERNET DRIVER TO A 68EN302 ETHERNET
DRIVER
Porting an Ethernet driver written for the MC68360 QUICC to the MC68EN302 requires only
that the QUICC driver be pared down to support a simpler implementation of Ethernet. In
the case of register settings and counters, many of the functions requiring user initialization
by the QUICC are either supported directly in the MC68EN302 hardware as dictated by the
Ethernet standard, or are provided in the indications that accompany the buffer descriptors.
This simplifies the initialization routines in the area of CRC calculation as well as the
maximum and minimum frame lengths, DMA operations and the backoff counter
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| SPAKDSP303AG100 | 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC SPAKDSP303AG100 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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