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參數資料
| 型號： | SP973T8CDP |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT FLASH METHOD ADC, PARALLEL ACCESS, PDIP18 |
| 封裝： | PLASTIC, DP-18 |
| 文件頁數： | 4/10頁 |
| 文件大?。?/td> | 293K |
| 代理商： | SP973T8CDP |
SP973T8
2
ELECTRICAL CHARACTERISTICS
These characteristics are guaranteed over the following conditions (unless otherwise stated):
Tamb = 25
°C, VCC = +5V ± 0.25V
Full temperature range = 0
°C to +70°C
DC CHARACTERISTICS
Full
25
Full
25
Full
25
Full
25
Full
25
Full
25
Full
25
Full
25
Full
25
Full
25
ICC
PD
VIN
IIN
f3db
CIN
RD
VRT
VRB
VRT0
VRB0
RTC
VIH
IIH
VIL
IIL
VOH
VOL
DNL
INL
100
110
475
520
1.8
150
325
1.8
2.75
1.75
3.3
3.5
120
600
390
70
30
440
4.3
2.3
-4
+3
1.5
4.3
3.3
3.8
0.1
140
130
735
680
VCC-0.7
1100
550
VCC-0.7
VCC
25
VCC-1.0
2
0.4
±1
±0.5
±1
mA
mW
V
A
MHz
pF
V
mV
/°C
V
A
V
A
V
LSB
Units
Conditions
Temp.
Symbol
Test level
Characteristic
Value
Min.
Typ.
Max.
AC CHARACTERISTICS (Refer to Fig.7)
Units
Conditions
Temp.
Symbol
Test level
Characteristic
Value
Min.
Typ.
Max.
Power Supply
Supply current
Power dissipation
Analog Input
Input range
Input bias current
3dB bandwidth
Input capacitance
Reference Ladder
Ladder resistance
Ladder voltage (top)
Ladder voltage (bottom)
Ladder offset (top)
Ladder offset (bottom)
Ladder temp. coeff.
Clock Input
Logic '1' voltage
Logic '1' current
Logic '0' voltage
Logic '0' current
Digital Outputs
Logic '1' voltage
Logic '0' voltage
Static performance
Differential non-linearity
Integral non-linearity
Clock min. high
Clock min. low
Max. conversion rate
Aperture delay
Output data delay
Output rise time
output fall time
Dynamic Performance
Differential non-linearity
Integral non-linearity
S/N ratio
Effective No. of bits
Bit Error Rate
25
Full
25
tPW1
tPW0
tAD
tD
tR
tF
DNL
INL
SNR
ENOB
BER
10
30
-0.85
40.9
6.5
50
3
7
6
8
±0.5
±1
44.5
44.1
43.3
7.1
7.0
6.9
1 in 109
+1
±2
ns
MHz
ns
LSB
dBc
bits
4
1
4
1
4
1
4
1
4
5
4
1
4
1
4
1
4
1
4
5
4
1
4
1
4
AIN = 15MHz at FS
With FCLK = 30MHz
AIN MAX = 10MHz at FS
AIN MAX = 1MHz at FS
AIN MAX = 5MHz at FS
AIN MAX = 10MHz at FS
AIN MAX = 1MHz at FS
AIN MAX = 5MHz at FS
AIN MAX = 10MHz at FS
VIN = VRT
A swing of 1V centred
on the voltage applied
to the
CLK pin
Into Standard LS
TTL Load
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