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參數資料
| 型號： | SMFR-29C516ESC |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 算術邏輯單元 |
| 英文描述： | 16-BIT ERROR DETECT AND CORRECT CKT, QFP100 |
| 封裝： | MQFP-100 |
| 文件頁數： | 39/42頁 |
| 文件大?。?/td> | 809K |
| 代理商： | SMFR-29C516ESC |
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1
GENERAL
1.1
SCOPE
This specification details the ratings, physical and electrical characteristics, tests and inspection
data for a CMOS monolithic 16 bits flow-through Error Detection And Correction circuit based
on type 29C516E.
It shall be read in conjunction with ESA/SCC Generic Specification N°9000, the requirements
of which are supplemented herein.
1.2
TYPE VARIANTS
Variants of the basic type integrated circuits specified herein , which are also covered by this
specification, are given in Table 1(a).
1.3
MAXIMUM RATINGS
The maximum ratings, which shall not exceeded at any time during use or storage, applicable
to the integrated circuits specified herein, are scheduled in Table 1(b).
1.4
PARAMETER DERATING INFORMATION
As per Figure 1. Parameters are specified at room temperature in Table 2 . in Table 3
parameters are specified over the full temperature range : -55°C to +125°C.
1.5
PHYSICAL DIMENSIONS
As per Figure 2.
1.6
PIN ASSIGNMENT
As per Figure 3(a).
1.7
TRUTH TABLE
Not applicable
1.8
CIRCUITS DESCRIPTION
Not applicable
1.9
FUNCTIONAL DIAGRAM
As per Figure 3(b).
1.10
HANDLING PRECAUTIONS (FOR INFORMATION ONLY)
These devices are susceptible to damage by electrostatic discharge. Therefore, suitable
precaution shall be taken for protection during all phases of manufacture, testing, packaging,
shipment and any handling.
These components are categorised as Class 1 with Minimum Critical Path Failure Voltage of
1000 Volts.
1.11
INPUT PROTECTION NETWORKS
ESD protection shall be incorporated into each input as shown in figure 3(c)
1.12
BONDING DIAGRAM
As per figure 3(d)
Document number
MHS/SCC 021
Date
Issue
Page
23/12/1999
Rev C
6
Rev C
6 /42
TEMI C
Semiconductors
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