參數(shù)資料
型號(hào): SI5100-H-BL
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 26/40頁(yè)
文件大小: 0K
描述: IC TXRX SONET/SDH LP HS 195-PBGA
標(biāo)準(zhǔn)包裝: 119
系列: SiPHY™
類型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: SONET/SDH
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
封裝/外殼: 195-LBGA
供應(yīng)商設(shè)備封裝: 195-BGA(15x15)
包裝: 托盤
Si5100
32
Rev. 1.5
P2
P1
TXCLK16OUT+
TXCLK16OUT–
OLVDS
Divided Down Transmit Output Clock.
This clock output is generated by dividing down
the high-speed output clock, TXCLKOUT, to
match the TXDOUT[15:0] word rate. This is
accomplished by dividing by either 4 or 16,
depending on the state of the MODE16 input.
The TXCLK16OUT is provided for use in counter
clocking schemes that transfer data between the
system framer and the Si5100. (See REFSEL
and REFRATE descriptions.)
K12
TXCLKDSBL
I
LVTTL
High-Speed Transmit Clock Disable.
When this input is high, the output driver for
TXCLKOUT is disabled. In applications that do
not require the output data clock, the output
clock driver should be disabled to save power.
Note: This input has an internal pulldown.
G1
H1
TXCLKOUT+
TXCLKOUT–
OCML
High-Speed Transmit Clock Output.
The high-speed output clock, TXCLKOUT, is
generated by the PLL in the clock multiplier unit.
Its frequency is nominally 16 or 32 times the
selected reference source.
Pin Number(s)
Name
I/O
Signal Level
Description
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