參數(shù)資料
型號： SAE81C91
廠商： INFINEON TECHNOLOGIES AG
英文描述： Standalone Full-CAN Controller
中文描述： 獨立全CAN控制器
文件頁數(shù)： 33/41頁
文件大?。?/td> 521K
代理商： SAE81C91
07Feb95@09:05h Intermediate Version
Semiconductor Group
32
SAE 81C90/91
Figure 7
Lengthening a Bit Period
Figure 8
Shortening a Bit Period
Delay Times
The total delay is calculated from the following single delays:
G
2
×
physical bus
t
Bus
(max. 100 ns acc. to CAN specification)
G
2
×
input comparator
t
Comp
(depends on application circuit)
G
2
×
output driver
t
Driver
(depends on application circuit)
G
1
×
input to output of CAN controller
t
InOut
(max. 1
t
SCL
+ 80 ns)
t
Delay
= 2
×
(
t
Bus
+
t
Comp
+
t
Driver
) +
t
InOut
Recommendations
On the premise of the stated conditions, there are the following essential requirements to be
maintained:
t
TSeg1
≥
t
Seg2
t
TSeg1
≥
t
Delay
t
TSeg2
>
t
SJW
t
TSeg2
≥
3
×
t
SCL
+
t
SJW
if bit SAM = 1 (otherwise bit recognition does not work).
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