參數(shù)資料
型號: SAB88C166W-5M
廠商: SIEMENS A G
元件分類: 微控制器/微處理器
英文描述: 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
中文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
文件頁數(shù): 53/58頁
文件大?。?/td> 611K
代理商: SAB88C166W-5M
SAB 88C166(W)
Semiconductor Group
52
AC Characteristics
(cont’d)
CLKOUT and READY for SAB 88C166W
V
CC
= 5 V
±
10 %;
T
A
= 0 to + 70 C
C
L
(for Port 0, Port 1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
V
SS
= 0 V
for SAB 88C166W-M
Notes
1)
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
2)
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2t
A
refer to the next following bus cycle.
Parameter
Symbol
CPU Clock = 16 MHz
Duty cycle 0.4 to 0.6
Variable CPU Clock
1/CLP = 1 to 20 MHz
Unit
min.
max.
min.
max.
CLKOUT cycle time
t
29
t
30
t
31
t
32
t
33
t
34
CC
CC
62.5
62.5
CLP
CLP
ns
CLKOUT high time
20
TCL
min
– 5
TCL
min
– 10
ns
CLKOUT low time
CC
15
ns
CLKOUT rise time
CC
5
5
ns
CLKOUT fall time
CC
0 +
t
A
5
10 +
t
A
0 +
t
A
5
10 +
t
A
ns
CLKOUT rising edge to
ALE falling edge
CC
ns
Synchronous READY
setup time to CLKOUT
t
35
SR
10
10
ns
Synchronous READY
hold time after CLKOUT
t
36
SR
10
10
ns
Asynchronous READY
low time
t
37
SR
77.5
CLP + 15
ns
Asynchronous READY
setup time
1)
t
58
SR
20
20
ns
Asynchronous READY
hold time
1)
t
59
SR
0
0
ns
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
2)
t
60
SR
0
0
+
2
t
A
+
t
F
2)
0
TCL – 25
+
2
t
A
+
t
F
2)
ns
相關(guān)PDF資料
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SAB88C166 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
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