參數(shù)資料
型號(hào): SAB88C166W-5M
廠商: SIEMENS A G
元件分類(lèi): 微控制器/微處理器
英文描述: 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
中文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP100
文件頁(yè)數(shù): 13/58頁(yè)
文件大?。?/td> 611K
代理商: SAB88C166W-5M
SAB 88C166(W)
Semiconductor Group
12
In order not to exceed the limit values listed above, a specific CKCTL setting requires a minimum
CPU clock frequency, as listed below.
The maximum number of allowed programming or erase attempts depends on the CPU clock
frequency and on the CKCTL setting chosen in turn. This number results from the actual pulse width
compared to the maximum pulse width (see above tables).
The table below lists some sample frequencies, the respective recommended CKCTL setting and
the resulting maximum number of program / erase pulses:
BE:
The Flash
Bank Erasing
bit field determines the Flash memory bank to be erased (see table
below). The physical addresses of the selected bank depend on the Flash memory mapping
chosen.
Setting of
CKCTL
Length of
TPRG
2
7
* 1/f
CPU
2
11
* 1/f
CPU
2
15
* 1/f
CPU
2
18
* 1/f
CPU
TPRG
@ f
CPU
= 20 MHz
6.4
μ
s
102.4
μ
s
1.64 ms
f
CPUmin
for programming
f
CPUmin
for erasing
0 0
1 MHz
---
0 1
16 MHz
1 MHz
1 0
---
3.28 MHz
1 1
13.11 ms
---
13.11 MHz
f
CPU
Programming
Erasing
CKCTL
TPROG
128
μ
s
12.8
μ
s
8
μ
s
6.4
μ
s
N
PROGmax
19
CKCTL
TPROG
N
ERASEmax
14648
1 MHz
0 0
0 1
2.05 ms
10 MHz
0 0
195
1 0
3.28 ms
9155
16 MHz
0 0
312
1 0
2.05 ms
14648
20 MHz
0 0
390
1 0
1.64 ms
18310
BE setting
Bank
Addresses Selected for Erasure (x = 0 or 1)
0 0
0 1
1 0
1 1
0
1
2
3
x’0000
H
to x’2FFF
H
x’3000
H
to x’5FFF
H
x’6000
H
to x’77FF
H
x’7800
H
to x’7FFF
H
相關(guān)PDF資料
PDF描述
SAB88C166 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
SAB88C166-5M 16-Bit CMOS Single-Chip Microcontrollers with/without oscillator prescaler with 32 KByte Flash EPROM
SAE 81C90 16-Bit Microcontroller(16位微控制器)
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