參數(shù)資料
型號(hào)： SAA7381
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： ATAPI CD-R block decoder
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP144
文件頁(yè)數(shù)： 9/108頁(yè)
文件大?。?/td> 380K
代理商： SAA7381
1997 Aug 12
9
Philips Semiconductors
Objective specification
ATAPI CD-R block decoder
SAA7381
DGND9
103
digital ground 9
V
DDD(pad4)
COMACK
104
digital peripheral supply voltage 4
105
I
C
UART
command acknowledge/transmit flow control
input
serial data clock for synchronous mode output
COMCLK
106
O
L
UART
n.c.
107 to 110
not connected
COMOUT
111
O
L
UART
transmit data output
COMIN
112
I
C
UART
receive data input
COMSYNC
113
I
C
UART
basic engine synchronization input
SYSSYNC
114
I
C
UART
basic engine synchronization input
SCCLK
115
O
M
sub-CPU
sub-CPU clock output
RD
116
I
T
sub-CPU
sub-CPU read enable (active LOW)
WR/R/W
117
I
T
sub-CPU
sub-CPU write enable/and read/write control
input (active LOW)
sub-CPU interrupt request output from host
interface (active LOW)
sub-CPU reset output
INT
118
O
L
sub-CPU
SRST
119
O
L
sub-CPU
SCA0/SCD0
120
I/O
L/T
sub-CPU
multiplexed address/data lines
SCA1/SCD1
121
I/O
L/T
DGND10
122
digital ground 10
V
DDD(pad5)
SCA2/SCD2
123
digital peripheral supply voltage 6
124
I/O
L/T
sub-CPU
multiplexed address/data lines
SCA3/SCD3
125
I/O
L/T
SCA4/SCD4
126
I/O
L/T
SCA5/SCD5
127
I/O
L/T
SCA6/SCD6
128
I/O
L/T
SCA7/SCD7
129
I/O
L/T
DGND11
130
digital ground 11
V
DDD(core2)
ALE
131
digital core supply voltage 2
132
I
T
sub-CPU
demultiplex enable input for lower address
lines
program store enable (active LOW)
PSEN
133
I
T
sub-CPU
SCA15
134
I
T
sub-CPU
upper address lines input
SCA14
135
I
T
SCA13
136
I
T
SCA12
137
I
T
DGND12
138
digital ground 12
SYMBOL
PIN
TYPE
DRIVE/
THRESHOLD
GROUPING
DESCRIPTION
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