參數(shù)資料
型號(hào): S29PL256N70GFW003
廠(chǎng)商: SPANSION LLC
元件分類(lèi): DRAM
英文描述: 256/128/128 Mb (16/8/8 M x 16-Bit) CMOS, 3.0 Volt-only Simultaneous Read/Write, Page-Mode Flash Memory
中文描述: 16M X 16 FLASH 3V PROM, 70 ns, PBGA84
封裝: 8 X 11.60 MM, LEAD FREE, FBGA-84
文件頁(yè)數(shù): 64/74頁(yè)
文件大?。?/td> 1968K
代理商: S29PL256N70GFW003
64
S29PL-N MirrorBit
Flash Family
S29PL-N_00_A5 June 6, 2007
D a t a
S h e e t
( P r e l i m i n a r y )
Figure 11.13
Data# Polling Timings (During Embedded Algorithms)
Note
VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read cycle
Figure 11.14
Toggle Bit Timings (During Embedded Algorithms)
Note
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array
data read cycle
Figure 11.15
DQ2 vs. DQ6
Note
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle DQ2 and DQ6.
WE#
CE#
OE#
High Z
t
OE
High Z
DQ7
DQ6–DQ0
RY/BY#
t
BUSY
Complement
True
Addresses
VA
t
OEH
t
CE
t
CH
t
OH
t
DF
VA
VA
Status Data
Complement
Status Data
True
Valid Data
Valid Data
t
ACC
t
RC
OE#
CE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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