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May 13, 2004 27631A4
S29GLxxxN MirrorBitTM Flash Family
57
A d v a n c e I n f o r m a t i o n
Table 11. Primary Vendor-Specific Extended Query
Command Definitions
Writing specific address and data commands or sequences into the command
register initiates device operations. Table
12
and Table
13
define the valid register
command sequences.
Writing incorrect address and data values or writing them
in the improper sequence may place the device in an unknown state.
A reset com-
mand is then required to return the device to reading array data.
All addresses are latched on the falling edge of WE# or CE#, whichever happens
later. All data is latched on the rising edge of WE# or CE#, whichever happens
first. Refer to the AC Characteristics section for timing diagrams.
Addresses
( x16)
Addresses
( x8)
Data
Description
40h
41h
42h
80h
82h
84h
0050h
0052h
0049h
Query-unique ASCII string “PRI”
43h
86h
0031h
Major version number, ASCII
44h
88h
0033h
Minor version number, ASCII
45h
8Ah
0010h
Address Sensitive Unlock (Bits 1-0)
0 = Required, 1 = Not Required
Process Technology (Bits 7-2) 0100b = 110 nm MirrorBit
46h
8Ch
0002h
Erase Suspend
0 = Not Supported, 1 = To Read Only, 2 = To Read & Write
47h
8Eh
0001h
Sector Protect
0 = Not Supported, X = Number of sectors in per group
48h
90h
0000h
Sector Temporary Unprotect
00 = Not Supported, 01 = Supported
49h
92h
0008h
Sector Protect/Unprotect scheme
0008h = Advanced Sector Protection
4Ah
94h
0000h
Simultaneous Operation
00 = Not Supported, X = Number of Sectors in Bank
4Bh
96h
0000h
Burst Mode Type
00 = Not Supported, 01 = Supported
4Ch
98h
0002h
Page Mode Type
00 = Not Supported, 01 = 4 Word Page, 02 = 8 Word Page
4Dh
9Ah
ACC (Acceleration) Supply Minimum
00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV
4Eh
9Ch
00C5h
ACC (Acceleration) Supply Maximum
00h = Not Supported, D7-D4: Volt, D3-D0: 100 mV
4Fh
9Eh
00xxh
WP# Protection
04h = Uniform sectors bottom WP# protect, 05h = Uniform sectors
top WP# protect
50h
A0h
0001h
Program Suspend
00h = Not Supported, 01h = Supported