參數(shù)資料
型號： S29GL064M90FBIR22
廠商： Spansion Inc.
英文描述： MOSFET, Switching; VDSS (V): 300; ID (A): 40; Pch : 150; RDS (ON) typ. (ohm) @10V: 0.058; RDS (ON) typ. (ohm) @4V[4.5V]: -; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 5150; toff (µs) typ: 0.22; Package: TO-3P
中文描述： 3.0伏只頁面模式閃存具有0.23微米工藝技術的MirrorBit
文件頁數(shù)： 109/160頁
文件大?。?/td> 2142K
代理商： S29GL064M90FBIR22
April 30, 2004 S29GLxxxM_00A5
S29GLxxxM MirrorBit
TM
Flash Family
109
P r e l i m i n a r y
After the Program Resume command is written, the device reverts to program-
ming. The system can determine the status of the program operation using the
DQ7 or DQ6 status bits, just as in the standard program operation. See Write Op-
eration Status for more information.
The system must write the Program Resume command (address bits are don’t
care) to exit the Program Suspend mode and continue the programming opera-
tion. Further writes of the Resume command are ignored. Another Program
Suspend command can be written after the device has resumed programming.
Figure 5. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is ini-
tiated by writing two unlock cycles, followed by a set-up command. Two
additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does
not
require
the system to preprogram prior to erase. The Embedded Erase algorithm auto-
matically preprograms and verifies the entire memory for an all zero data pattern
prior to electrical erase. The system is not required to provide any controls or tim-
ings during these operations. Table
31
and Table
32
show the address and data
requirements for the chip erase command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read
mode and addresses are no longer latched. The system can determine the status
of the erase operation by using DQ7, DQ6, or DQ2. Refer to the Write Operation
Status section for information on these status bits.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μ
s
相關PDF資料
PDF描述
S29GL064M90FBIR23 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FDIR22 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FDIR23 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FDIR30 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
S29GL064M90FDIR32 MOSFET, Switching; VDSS (V): 20; ID (A): 90; Pch : 100; RDS (ON) typ. (ohm) @10V: 0.0024; RDS (ON) typ. (ohm) @4V[4.5V]: [0.0035]; RDS (ON) typ. (ohm) @2.5V: -; Ciss (pF) typ: 6800; toff (µs) typ: 0.11; Package: TO-220AB
相關代理商/技術參數(shù)
參數(shù)描述
S29GL064M90FFIR2 制造商:Spansion 功能描述:
S29GL064M90TAIR00 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8 90ns 48-Pin TSOP Tray
S29GL064M90TAIR2 制造商:Spansion 功能描述:
S29GL064M90TAIR20 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 64M-Bit 8M x 8/4M x 16 90ns 56-Pin TSOP Tray
S29GL064M90TAIR3 制造商:Spansion 功能描述:NOR Flash, 4M x 16, 48 Pin, Plastic, TSSOP
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