參數(shù)資料
型號: S1C63408F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 9/151頁
文件大小: 1171K
代理商: S1C63408F0A0100
98
EPSON
S1C63406/408 TECHNICAL MANUAL
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Serial Interface)
Read the data after waiting for a receive completion interrupt.
When performing parity check in the 7-bit asynchronous mode, "0" is loaded into the 8th bit (TRXD7) that
corresponds to the parity bit.
The serial data input from the SIN terminal is level converted, making the High (VDD) level bit "1" and
the Low (VSS) level bit "0" and is then loaded into this buffer.
At initial reset, the buffer content is undefined.
OER: Overrun error flag (FF73HD0)
Indicates the generation of an overrun error.
When "1" is read: Error
When "0" is read: No error
When "1" is written: Reset to "0"
When "0" is written: Invalid
OER is an error flag that indicates the generation of an overrun error and becomes "1" when an error has
been generated.
An overrun error is generated when a receiving of data has completed prior to writing "1" to RXTRG in
the asynchronous mode.
OER is reset to "0" by writing "1".
OER is set to "0" at initial reset or when RXEN is set to "0".
PER: Parity error flag (FF73HD1)
Indicates the generation of a parity error.
When "1" is read: Error
When "0" is read: No error
When "1" is written: Reset to "0"
When "0" is written: Invalid
PER is an error flag that indicates the generation of a parity error and becomes "1" when an error has been
generated.
When a parity check is performed in the asynchronous mode, a parity error will be generated if data that
does not match the parity is received.
PER is reset to "0" by writing "1".
PER is set to "0" at initial reset or when RXEN is set to "0".
FER: Framing error flag (FF73HD2)
Indicates the generation of a framing error.
When "1" is read: Error
When "0" is read: No error
When "1" is written: Reset to "0"
When "0" is written: Invalid
FER is an error flag that indicates the generation of a framing error and becomes "1" when an error has
been generated.
When the stop bit for the receiving in the asynchronous mode has become "0", a framing error is gener-
ated.
FER is reset to "0" by writing "1".
FER is set to "0" at initial reset or when RXEN is set to "0".
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