S1C63406/408 TECHNICAL MANUAL
EPSON
21
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Table 4.1.1 (c) I/O memory map (FF7CH–FFCBH)
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
WR/W
R
FF7CH
00
SWRST SWRUN
0 3
SWRST3
SWRUN
– 2
Reset
0
Reset
Run
Invalid
Stop
Unused
Stopwatch timer reset (writing)
Stopwatch timer Run/Stop
R
FF7DH
SWD3
SWD2
SWD1
SWD0
SWD3
SWD2
SWD1
SWD0
0
Stopwatch timer data
BCD (1/100 sec)
SWD7
SWD6
SWD5
SWD4
0
Stopwatch timer data
BCD (1/10 sec)
R
FF7EH
SWD7
SWD6
SWD5
SWD4
CHSEL
PTOUT
CKSEL1
CKSEL0
0
Timer1
On
OSC3
Timer0
Off
OSC1
TOUT output channel selection
TOUT output control
Prescaler 1 source clock selection
Prescaler 0 source clock selection
R/W
FFC1H
CHSEL PTOUT CKSEL1 CKSEL0
PTPS01
PTPS00
PTRST03
PTRUN0
0
– 2
0
Reset
Run
Invalid
Stop
Prescaler 0
division ratio
selection
Timer 0 reset (reload)
Timer 0 Run/Stop
WR/W
R/W
FFC2H
PTPS01 PTPS00 PTRST0 PTRUN0
0
1/1
1
1/4
2
1/32
3
1/256
[PTPS01, 00]
Division ratio
MODE16
EVCNT
FCSEL
PLPOL
0
16-bit
× 1
Event ct.
With NR
8-bit
× 2
Timer
No NR
8-bit
× 2 or 16-bit × 1 timer mode selection
Timer 0 counter mode selection
Timer 0 function selection (for event counter mode)
Timer 0 pulse polarity selection (for event counter mode)
PTPS11
PTPS10
PTRST13
PTRUN1
0
– 2
0
Reset
Run
Invalid
Stop
Prescaler 1
division ratio
selection
Timer 1 reset (reload)
Timer 1 Run/Stop
WR/W
R/W
FFC3H
PTPS11 PTPS10 PTRST1 PTRUN1
0
1/1
1
1/4
2
1/32
3
1/256
[PTPS11, 10]
Division ratio
R/W
FFC0H
MODE16 EVCNT FCSEL
PLPOL
RLD03
RLD02
RLD01
RLD00
0
MSB
Programmable timer 0 reload data (low-order 4 bits)
LSB
R/W
FFC4H
RLD03
RLD02
RLD01
RLD00
RLD07
RLD06
RLD05
RLD04
0
MSB
Programmable timer 0 reload data (high-order 4 bits)
LSB
R/W
FFC5H
RLD07
RLD06
RLD05
RLD04
RLD13
RLD12
RLD11
RLD10
0
MSB
Programmable timer 1 reload data (low-order 4 bits)
LSB
R/W
FFC6H
RLD13
RLD12
RLD11
RLD10
RLD17
RLD16
RLD15
RLD14
0
MSB
Programmable timer 1 reload data (high-order 4 bits)
LSB
R/W
FFC7H
RLD17
RLD16
RLD15
RLD14
PTD03
PTD02
PTD01
PTD00
0
MSB
Programmable timer 0 data (low-order 4 bits)
LSB
R
FFC8H
PTD03
PTD02
PTD01
PTD00
PTD07
PTD06
PTD05
PTD04
0
MSB
Programmable timer 0 data (high-order 4 bits)
LSB
R
FFC9H
PTD07
PTD06
PTD05
PTD04
PTD13
PTD12
PTD11
PTD10
0
MSB
Programmable timer 1 data (low-order 4 bits)
LSB
R
FFCAH
PTD13
PTD12
PTD11
PTD10
PTD17
PTD16
PTD15
PTD14
0
MSB
Programmable timer 1 data (high-order 4 bits)
LSB
R
FFCBH
PTD17
PTD16
PTD15
PTD14