參數(shù)資料
型號(hào): S1C60L13F
元件分類(lèi): 微控制器/微處理器
英文描述: 4-BIT, MROM, 0.032768 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP14-80
文件頁(yè)數(shù): 19/104頁(yè)
文件大?。?/td> 850K
代理商: S1C60L13F
S1C60N13 TECHNICAL MANUAL
EPSON
13
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
2E3H
K03
K02
K01
K00
R
K03
K02
K01
K00
2
High
Low
Input port data (K00–K03)
2E1H
SWL3
SWL2
SWL1
SWL0
R
SWL3
SWL2
SWL1
SWL0
0
MSB
Stopwatch timer 1/100 sec data (BCD)
LSB
2E2H
SWH3
SWH2
SWH1
SWH0
R
SWH3
SWH2
SWH1
SWH0
0
MSB
Stopwatch timer 1/10 sec data (BCD)
LSB
2E0H
TM3
TM2
TM1
TM0
R
TM3
TM2
TM1
TM0
0
Clock timer data (2 Hz)
Clock timer data (4 Hz)
Clock timer data (8 Hz)
Clock timer data (16 Hz)
2E5H
EIK03
EIK02
EIK01
EIK00
R/W
EIK03
EIK02
EIK01
EIK00
0
Enable
Mask
Interrupt mask register (K00–K03)
2E4H
KCP03
KCP02
KCP01
KCP00
R/W
KCP03
KCP02
KCP01
KCP00
0
Input comparison register (K00–K03)
2E6H
HLMOD
0
EISWIT1 EISWIT0
R/W
R
R/W
HLMOD
0 3
EISWIT1
EISWIT0
0
2
0
Heavy load
Enable
Normal
Mask
Heavy load protection mode register
Unused
Interrupt mask register (stopwatch 1 Hz)
Interrupt mask register (stopwatch 10 Hz)
2E8H
CSDC1
ETI2
ETI8
ETI32
R/W
CSDC1
ETI2
ETI8
ETI32
0
Static
Enable
Dynamic
Mask
LCD drive switch
Interrupt mask register (clock timer 2 Hz)
Interrupt mask register (clock timer 8 Hz)
Interrupt mask register (clock timer 32 Hz)
2E7H
SCTRG
EIK10
KCP10
K10
WR
R/W
SCTRG
3
EIK10
KCP10
K10
0
2
Trigger
Enable
High
Mask
Low
Serial I/F clock trigger
Interrupt mask register (K10)
Input comparison register (K10)
Input port data (K10)
2D0H
000
CSDC2
R
R/W
0 3
CSDC2
2
1
Normal
All off
Unused
LCD all off control
2E9H
0
TI2
TI8
TI32
R
0 3
TI2 4
TI8 4
TI32 4
2
0
Yes
No
Unused
Interrupt factor flag (clock timer 2 Hz)
Interrupt factor flag (clock timer 8 Hz)
Interrupt factor flag (clock timer 32 Hz)
2EAH
IK1
IK0
SWIT1
SWIT0
R
IK1 4
IK0 4
SWIT1 4
SWIT0 4
0
Yes
No
Interrupt factor flag (K10)
Interrupt factor flag (K00–K03)
Interrupt factor flag (stopwatch 1 Hz)
Interrupt factor flag (stopwatch 10 Hz)
2EBH
R03
R02
R01
R00
R/W
R03
R02
R01
R00
0
High
Low
Output port (R03)
Output port (R02)
Output port (R01)
Output port (R00)
2ECH
R13
R12
R11
SIOF
R10
R/W
R
R/W
R13
R12
R11
SIOF
R10
0
High/On
High
Run
High/On
Low/Off
Low
Stop
Low/Off
Output port (R13)/BZ output control
Output port (R12)/FOUT output control
Output port (R11)
Output port (SIOF)
Output port (R10)/BZ output control
1
2
Initial value at initial reset
Not set in the circuit
3
4
Always "0" being read
Reset (0) immediately after being read
5 Undefined
Table 4.1.1(a) I/O memory map (2D0H, 2E0H–2ECH)
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