參數(shù)資料
型號: RTL8201CP
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
中文描述: SINGLE-CHIP/SINGLE-PORT個10/100M快速以太網(wǎng)PHYCEIVER(自動交叉)
文件頁數(shù): 29/38頁
文件大?。?/td> 512K
代理商: RTL8201CP
RTL8201CP
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
24
Track ID: JATR-1076-21 Rev. 1.21
8.2. AC Characteristics
8.2.1. MII Transmission Cycle Timing
Table 33. MII Transmission Cycle Timing
Symbol
t
1
Description
TXCLK high pulse width
Minimum
14
Typical
20
Maximum
26
Unit
ns
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
140
14
140
10
200
20
200
40
400
24
260
26
260
ns
ns
ns
ns
ns
ns
t
2
TXCLK low pulse width
t
3
TXCLK period
t
4
TXEN, TXD[0:3] setup to
TXCLK rising edge
10Mbps
100Mbps
5
ns
ns
10
25
t
5
TXEN, TXD[0:3] hold after
TXCLK rising edge
10Mbps
100Mbps
10Mbps
100Mbps
5
ns
ns
ns
ns
40
400
160
t
6
TXEN sampled to CRS high
t
7
TXEN sampled to CRS low
10Mbps
100Mbps
2000
140
ns
ns
60
70
t
8
Transmit latency
10Mbps
100Mbps
10Mbps
400
170
ns
ns
ns
100
t
9
Sampled TXEN inactive to end
of frame
Figure 6 shows an example of a packet transfer from MAC to PHY on the MII interface.
TXCLK
V
IH(min)
V
IL(max)
TXD[0:3]
TXEN
V
IH(min)
V
IL(max)
t
4
t
5
t
3
t
1
t
2
Figure 6. MII Transmission Cycle Timing-1
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