參數資料
型號: RTL8201CP
廠商: Electronic Theatre Controls, Inc.
英文描述: SINGLE-CHIP/SINGLE-PORT 10/100M FAST ETHERNET PHYCEIVER (With Auto Crossover)
中文描述: SINGLE-CHIP/SINGLE-PORT個10/100M快速以太網PHYCEIVER(自動交叉)
文件頁數: 25/38頁
文件大小: 512K
代理商: RTL8201CP
RTL8201CP
Datasheet
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
20
Track ID: JATR-1076-21 Rev. 1.21
7.6. Serial Network Interface
The RTL8201CP also supports the traditional 7-wire serial interface to operate with legacy MACs or
embedded systems. To setup for this mode of operation, pull the MII/SNIB pin low. By doing so, the
RTL8201CP will ignore the setup of the ANE and SPEED pins. In this mode, the RTL8201CP will set
the default operation to 10Mbps and half-duplex mode.
Note: The RTL8201CP also supports full-duplex mode operation if the DUPLEX pin has been pulled high.
This interface consists of a 10Mbps transmit and receive clock generated by PHY, 10Mbps transmit and
receive serial data, transmit enable, collision detect, and carry sense signals.
7.7. Power Down, Link Down, Power Saving, and Isolation
Modes
Four types of Power Saving mode operation are supported. This section describes how to implement each
mode. The first three modes are configured through software, and the fourth through hardware.
Table 28. Power Saving Mode Pin Settings
Mode
Analog Off
Description
Setting bit 11 of register 17 to 1 will put the RTL8201CP into analog off state. In analog off state, the
RTL8201CP will power down all analog functions such as transmit, receive, PLL, etc. However, the
internal 25MHz crystal oscillator will not be powered down. Digital functions in this mode are still
available which allows reacquisition of analog functions
Setting bit 12 of register 17 to 1, or pulling the LDPS pin high will put the RTL8201CP into LDPS
(Link Down Power Saving) mode. In LDPS mode, the RTL8201CP will detect the link status to
decide whether or not to turn off the transmit function. If the link is off, FLP or 100Mbps
IDLE/10Mbps NLP will not be transmitted. However, some signals similar to NLP will be
transmitted. Once the receiver detects leveled signals, it will stop the signal and transmit FLP or
100Mbps IDLE/10Mbps NLP again. This can cut power used by 60%~80% when the link is down.
Setting bit 11 of register 0 to 1 puts the RTL8201CP into power down mode. This is the maximum
power saving mode while the RTL8201CP is still alive. In PWD mode, the RTL8201CP will turn off
all analog/digital functions except the MDC/MDIO management interface. Therefore, if the
RTL8201CP is put into PWD mode and the MAC wants to recall the PHY, it must create the
MDC/MDIO timing by itself (this is done by software).
This mode is different from the three previous software configured power saving modes. This mode
is configured by hardware pin 43. Setting pin 43 high will isolate the RTL8201CP from the Media
Access Controller (MAC) and the MDC/MDIO management interface. In this mode, power
consumption is minimal.
LDPS
PWD
Isolation
7.8. Media Interface
7.8.1. 100Base-TX
100Base-TX Transmit Function
Transmit data in 4-bit nibbles (TXD[3:0]) clocked at 25MHz (TXC) is transformed into 5B symbol code
(4B/5B encoding). Scrambling, serializing, and conversion to 125MHz, and NRZ to NRZI then takes
place. After this process, the NRZI signal is passed to the MLT-3 encoder, then to the transmit line driver.
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