參數(shù)資料
型號： R5F56218BDLE#U0
廠商： Renesas Electronics America
文件頁數(shù)： 79/148頁
文件大?。?/td> 0K
描述： MCU 32BIT FLASH 512KROM 145TFLGA
產(chǎn)品培訓(xùn)模塊： RX Compare Match Timer
RX DMAC
標(biāo)準(zhǔn)包裝： 1
系列： RX600
核心處理器： RX
芯體尺寸： 32-位
速度： 100MHz
連通性： CAN，EBI/EMI，I²C，SCI，SPI，USB
外圍設(shè)備： DMA，LVD，POR，PWM，WDT
輸入/輸出數(shù)： 103
程序存儲器容量： 512KB（512K x 8）
程序存儲器類型： 閃存
RAM 容量： 96K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x10/12b，D/A 2x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 145-TFLGA
包裝： 托盤
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 34
2004 Microchip Technology Inc.
ADRESH
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
ADRESL
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
ADCON0
PIC18F6X20 PIC18F8X20
--00 0000
--uu uuuu
ADCON1
PIC18F6X20 PIC18F8X20
--00 0000
--uu uuuu
ADCON2
PIC18F6X20 PIC18F8X20
0--- -000
u--- -uuu
CCPR1H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCPR1L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCP1CON
PIC18F6X20 PIC18F8X20
--00 0000
--uu uuuu
CCPR2H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCPR2L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCP2CON
PIC18F6X20 PIC18F8X20
--00 0000
--uu uuuu
CCPR3H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCPR3L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
CCP3CON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
CVRCON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
CMCON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
TMR3H
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
TMR3L
PIC18F6X20 PIC18F8X20
xxxx xxxx
uuuu uuuu
T3CON
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
PSPCON
PIC18F6X20 PIC18F8X20
0000 ----
uuuu ----
SPBRG1
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
RCREG1
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
TXREG1
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
TXSTA1
PIC18F6X20 PIC18F8X20
0000 -010
uuuu -uuu
RCSTA1
PIC18F6X20 PIC18F8X20
0000 000x
uuuu uuuu
EEADRH
PIC18F6X20 PIC18F8X20
---- --00
---- --uu
EEADR
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
EEDATA
PIC18F6X20 PIC18F8X20
0000 0000
uuuu uuuu
EECON2
PIC18F6X20 PIC18F8X20
---- ----
EECON1
PIC18F6X20 PIC18F8X20
xx-0 x000
uu-0 u000
TABLE 3-3:
INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on Reset,
Brown-out Reset
MCLR Resets
WDT Reset
RESET
Instruction
Stack Resets
Wake-up via WDT
or Interrupt
Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
2:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the
interrupt vector (0008h or 0018h).
3:
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the
hardware stack.
4:
See Table 3-2 for Reset value for specific condition.
5:
Bit 6 of PORTA, LATA and TRISA are enabled in ECIO and RCIO Oscillator modes only. In all other
oscillator modes, they are disabled and read ‘0’.
6:
Bit 6 of PORTA, LATA and TRISA are not available on all devices. When unimplemented, they are read ‘0’.
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