參數(shù)資料
型號: PPC5604BCLL64
廠商: Freescale Semiconductor
文件頁數(shù): 53/109頁
文件大小: 0K
描述: MCU 32BIT 512K 64MHZ
標準包裝: 90
系列: MPC56xx Qorivva
核心處理器: e200z0h
芯體尺寸: 32-位
速度: 64MHz
連通性: CAN,I²C,LIN,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 79
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 4K x 16
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 28x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
MPC5604B/C Microcontroller Data Sheet, Rev. 11.1
Package pinouts and signal descriptions
Freescale Semiconductor
48
3.17
Power management electrical characteristics
3.17.1
Voltage regulator electrical characteristics
The device implements an internal voltage regulator to generate the low voltage core supply VDD_LV from the high voltage
ballast supply VDD_BV. The regulator itself is supplied by the common I/O supply VDD. The following supplies are involved:
VIL
SR P Input low Level CMOS
(Schmitt Trigger)
0.4
0.35VDD V
VHYS CC C Input hysteresis CMOS
(Schmitt Trigger)
—0.1VDD
——
V
VOL
CC P Output low level
Push Pull, IOL = 2mA,
VDD = 5.0 V ± 10%, PAD3V5V = 0
(recommended)
0.1VDD
V
C
Push Pull, IOL = 1mA,
VDD = 5.0 V ± 10%, PAD3V5V = 12
0.1VDD
C
Push Pull, IOL = 1mA,
VDD = 3.3 V ± 10%, PAD3V5V = 1
(recommended)
——
0.5
ttr
CC D Output transition time
output pin3
CL = 25pF,
VDD = 5.0 V ± 10%, PAD3V5V = 0
10
ns
CL = 50pF,
VDD = 5.0 V ± 10%, PAD3V5V = 0
——
20
CL = 100pF,
VDD = 5.0 V ± 10%, PAD3V5V = 0
——
40
CL = 25pF,
VDD = 3.3 V ± 10%, PAD3V5V = 1
——
12
CL = 50pF,
VDD = 3.3 V ± 10%, PAD3V5V = 1
——
25
CL = 100pF,
VDD = 3.3 V ± 10%, PAD3V5V = 1
——
40
WFRST SR P RESET input filtered
pulse
——
40
ns
WNFRST SR P RESET input not filtered
pulse
1000
ns
|IWPU| CC P Weak pull-up current
absolute value
VDD = 3.3 V ± 10%, PAD3V5V = 1
10
150
A
DVDD = 5.0 V ± 10%, PAD3V5V = 0
10
150
PVDD = 5.0 V ± 10%, PAD3V5V = 12
10
250
1 VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified
2 This transient configuration does not occurs when device is used in the VDD = 3.3 V ± 10% range.
3 CL includes device and package capacitance (CPKG <5pF).
Table 24. Reset electrical characteristics (continued)
Symbol
C
Parameter
Conditions1
Value
Unit
Min
Typ
Max
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