參數(shù)資料
型號(hào)： PPC5604BCLL64
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 1/109頁(yè)
文件大?。?/td> 0K
描述： MCU 32BIT 512K 64MHZ
標(biāo)準(zhǔn)包裝： 90
系列： MPC56xx Qorivva
核心處理器： e200z0h
芯體尺寸： 32-位
速度： 64MHz
連通性： CAN，I²C，LIN，SCI，SPI
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 79
程序存儲(chǔ)器容量： 512KB（512K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大小： 4K x 16
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 28x10b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-LQFP
包裝： 托盤(pán)
Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5604BC
Rev. 11.1, 10/2013
Freescale Semiconductor, Inc., 2009-2013. All rights reserved.
This document contains information on a product under development. Freescale reserves
the right to change or discontinue this product without notice.
MPC5604B/C
TBD
MAPBGA–225
15 mm x 15 mm
QFN12
##_mm_x_##mm
SOT-343R
##_mm_x_##mm
PKG-TBD
## mm x ## mm
208 MAPBGA
(17 x 17 x 1.7 mm)
144 LQFP
(20 x 20 x 1.4 mm)
100 LQFP
(14 x 14 x 1.4 mm)
64 LQFP
(10 x 10 x 1.4 mm)
Features
Single issue, 32-bit CPU core complex (e200z0)
—
Compliant with the Power Architecture embedded category
—
Includes an instruction set enhancement allowing variable
length encoding (VLE) for code size footprint reduction. With
the optional encoding of mixed 16-bit and 32-bit instructions, it
is possible to achieve significant code size footprint reduction.
Up to 512 KB on-chip code flash supported with the flash controller
and ECC
64 (4 × 16) KB on-chip data flash memory with ECC
Up to 48 KB on-chip SRAM with ECC
Memory protection unit (MPU) with 8 region descriptors and 32-byte
region granularity
Interrupt controller (INTC) with 148 interrupt vectors, including 16
external interrupt sources and 18 external interrupt/wakeup sources
Frequency modulated phase-locked loop (FMPLL)
Crossbar switch architecture for concurrent access to peripherals, flash
memory, or RAM from multiple bus masters
Boot assist module (BAM) supports internal flash programming via a
serial link (CAN or SCI)
Timer supports input/output channels providing a range of 16-bit input
capture, output compare, and pulse width modulation functions
(eMIOS-lite)
10-bit analog-to-digital converter (ADC)
3 serial peripheral interface (DSPI) modules
Up to 4 serial communication interface (LINFlex) modules
Up to 6 enhanced full CAN (FlexCAN) modules with configurable
buffers
1 inter IC communication interface (I2C) module
Up to 123 configurable general purpose pins supporting input and
output operations (package dependent)
Real Time Counter (RTC) with clock source from 128 kHz or 16 MHz
internal RC oscillator supporting autonomous wakeup with 1 ms
resolution with max timeout of 2 seconds
Up to 6 periodic interrupt timers (PIT) with 32-bit counter resolution
1 System Module Timer (STM)
Nexus development interface (NDI) per IEEE-ISTO 5001-2003 Class
Two Plus standard
Device/board boundary Scan testing supported with per Joint Test
Action Group (JTAG) of IEEE (IEEE 1149.1)
On-chip voltage regulator (VREG) for regulation of input supply for
all internal levels
MPC5604B/C
Microcontroller Data Sheet
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
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