參數(shù)資料
型號: PIC16C662T-20I/P
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 20 MHz, RISC MICROCONTROLLER, PDIP40
封裝: 0.600 INCH, PLASTIC, DIP-40
文件頁數(shù): 94/136頁
文件大?。?/td> 634K
代理商: PIC16C662T-20I/P
PIC16C64X & PIC16C66X
DS30559A-page 60
Preliminary
1996 Microchip Technology Inc.
9.4
Power-on Reset (POR), Power-up
Timer (PWRT), Oscillator Start-up
Timer (OST), Brown-out Reset (BOR),
and Parity Error Reset (PER)
9.4.1
POWER-ON RESET (POR)
A Power-on Reset pulse is generated on-chip when
VDD rise is detected (in the range of 1.6V to 1.8V). To
take advantage of the POR, just tie the MCLR pin
directly (or through a resistor) to VDD. This will
eliminate external RC components usually needed to
create a Power-on Reset. A maximum rise time for VDD
is required. See Electrical Specications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, etc.) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating conditions are
met.
For additional information, refer to Application Note
AN607 “
Power-up Trouble Shooting.”
9.4.2
POWER-UP TIMER (PWRT)
The Power-up Timer provides a xed 72 ms (nominal)
delay on power-up only, from POR or BOR. The
Power-up Timer operates on an internal RC oscillator.
The chip is kept in reset as long as PWRT is active. The
PWRT delay allows VDD to rise to an acceptable level.
A conguration bit, PWRTE can disable (if set) or
enable (if cleared or programmed) the Power-up Timer.
The Power-up Timer should always be enabled when
Brown-out Reset is enabled.
The power-up time delay will vary from chip to chip due
to VDD, temperature, and process variations. See DC
parameters for details.
9.4.3
OSCILLATOR START-UP TIMER (OST)
The Oscillator Start-Up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over. This ensures that the crystal
oscillator or resonator has started and stabilized.
The OST time-out is invoked only for XT, LP, and HS
modes and only on Power-on Reset or wake-up from
SLEEP.
9.4.4
BROWN-OUT RESET (BOR)
PIC16C64X & PIC16C66X devices have on-chip
Brown-out Reset circuitry. A conguration bit, BODEN,
can disable (if clear/programmed) or enable (if set) the
Brown-out Reset circuitry. If VDD falls below 4.0V
(Parameter D005 in ES section) for greater than
parameter 35 in Table 12-6, the brown-out situation will
reset the chip. A reset is not guaranteed to occur if VDD
falls below 4.0V for less than parameter 35. The chip
will remain in Brown-out Reset until VDD rises above
BVDD. The Power-up Timer will now be invoked and will
keep the chip in reset an additional 72 ms. If VDD drops
below BVDD while the Power-up Timer is running, the
chip will go back into a Brown-out Reset and the
Power-up Timer will be initialized. Once VDD rises
above BVDD, the Power-up Timer will execute a 72 ms
time delay. The Power-up Timer should always be
enabled when Brown-out Reset is enabled. Figure 9-8
shows typical Brown-out situations.
FIGURE 9-8:
BROWN-OUT SITUATIONS
72 ms
BVDD Max.
BVDD Min.
VDD
Internal
Reset
BVDD Max.
BVDD Min.
VDD
Internal
Reset
72 ms
<72 ms
72 ms
BVDD Max.
BVDD Min.
VDD
Internal
Reset
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