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| 型號(hào)： | PI7C8154ANAE |
| 廠商： | Pericom |
| 文件頁(yè)數(shù)： | 51/114頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC PCI-PCI BRIDGE ASYNC 304-PBGA |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 系列： | * |
| 應(yīng)用： | * |
| 接口： | * |
| 電源電壓： | * |
| 封裝/外殼： | 304-BBGA |
| 供應(yīng)商設(shè)備封裝： | 304-PBGA（31x31） |
| 包裝： | 管件 |
| 安裝類(lèi)型： | 表面貼裝 |
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PI7C8154A
ASYNCHRONOUS 2-PORT
PCI-to-PCI BRIDGE
Advance Information
Page 41 of 113
DEC 2009 REVISION 1.02
Table 2-7 DELAYED WRITE TARGET TERMINATION RESPONSE
Target Termination
Response
Normal
Returning disconnect to initiator with first data transfer only if multiple data phases
requested.
Target Retry
Returning target retry to initiator. Continue write attempts to target
Target Disconnect
Returning disconnect to initiator with first data transfer only if multiple data phases
requested.
Target Abort
Returning target abort to initiator. Set received target abort bit in target interface status
register. Set signaled target abort bit in initiator interface status register.
After the PI7C8154A makes 224 (default) attempts of the same delayed write trans-action on the
target bus, PI7C8154A asserts P_SERR# if the SERR# enable bit (bit 8 of command register for
the secondary bus) is set and the delayed-write-non-delivery bit is not set. The delayed-write-non-
delivery bit is bit 5 of P_SERR# event disable register (offset 64h). PI7C8154A will report system
error. See Section 5.4 for a description of system error conditions.
2.11.3.2
POSTED WRITE TARGET TERMINATION RESPONSE
When PI7C8154A initiates a posted write transaction, the target termination cannot be passed back
to the initiator. Table 2-8 shows the response to each type of target termination that occurs during a
posted write transaction.
Table 2-8 RESPONSE TO POSTED WRITE TARGET TERMINATION
Target Termination
Repsonse
Normal
No additional action.
Target Retry
Repeating write transaction to target.
Target Disconnect
Initiate write transaction for delivering remaining posted write data.
Target Abort
Set received-target-abort bit in the target interface status register. Assert P_SERR# if
enabled, and set the signaled-system-error bit in primary status register.
Note that when a target retry or target disconnect is returned and posted write data associated with
that transaction remains in the write buffers, PI7C8154A initiates another write transaction to
attempt to deliver the rest of the write data. If there is a target retry, the exact same address will be
driven as for the initial write trans-action attempt. If a target disconnect is received, the address that
is driven on a subsequent write transaction attempt will be updated to reflect the address of the
current DWORD. If the initial write transaction is Memory-Write-and-Invalidate transaction, and a
partial delivery of write data to the target is performed before a target disconnect is received,
PI7C8154A will use the memory write command to deliver the rest of the write data. It is because
an incomplete cache line will be transferred in the subsequent write transaction attempt.
After the PI7C8154A makes 224 (default) write transaction attempts and fails to deliver all posted
write data associated with that transaction, PI7C8154A asserts P_SERR# if the primary SERR#
enable bit is set (bit 8 of command register for secondary bus) and posted-write-non-delivery bit is
not set. The posted-write-non-delivery bit is the bit 2 of P_SERR# event disable register (offset
64h). PI7C8154A will report system error. See Section 5.4 for a discussion of system error
conditions.
2.11.3.3
DELAYED READ TARGET TERMINATION RESPONSE
When PI7C8154A initiates a delayed read transaction, the abnormal target responses can be passed
back to the initiator. Other target responses depend on how much data the initiator requests. Table
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| PI7C8154ANAE-33 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154B | 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT 64 BIT 66MHZ PCI TO PCI BRIDGE |
| PI7C8154BNA | 制造商:Pericom Semiconductor Corporation 功能描述: |
| PI7C8154BNAE | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| PI7C8154BNAE-80 | 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI 64B/66MHz 2 Port PCI Bridge RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
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