- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299640 > PDM41258SA7SO 64K X 4 STANDARD SRAM, 7 ns, PDSO24 PDF資料下載
參數(shù)資料
| 型號： | PDM41258SA7SO |
| 元件分類： | SRAM |
| 英文描述： | 64K X 4 STANDARD SRAM, 7 ns, PDSO24 |
| 文件頁數(shù)： | 7/8頁 |
| 文件大小： | 353K |
| 代理商： | PDM41258SA7SO |
PDM41258
Rev. 2.2 - 4/27/98
7
1
2
3
4
5
6
7
8
9
10
11
12
Low VCC Data Retention Waveform
Data Retention Electrical Characteristics (LA Version Only)
NOTES: (For three previous Electrical Characteristics tables)
1. The device is continuously selected. Chip Enable is held in its active state.
2. The address is valid prior to or coincident with the latest occuring Chip Enable.
3. At any given temperature and voltage condition, tHZCE is less than tLZCE.
4. This parameter is sampled.
5. The parameter is tested with CL = 5 pF as shown in Figure 2. Transition is measured
±200 mV from steady state voltage.
6. VCC = 5V ± 5%.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDR
VCC for Retention Data
2—
—
V
ICCDR
Data Retention Current
CE
≥ V
CC – 0.2V
VIN ≥ VCC – 0.2V
or
≤ 0.2V
VCC = 2V
—
95
500
A
VCC = 3V
—
350
750
A
tCDR
Chip Deselect to Data Retention Time
0
—
ns
tR
(4)
Operation Recovery Time
tRC
——
ns
DON'T CARE
VCC
V
IH
IL
t CDR
V
t R
4.5V
Data Retention Mode
CE
DR
VDR
相關PDF資料 |
PDF描述 |
|---|---|
| PDM41298SA20TI | 64K X 4 STANDARD SRAM, 20 ns, PDSO28 |
| PDM42245L25GI | 4K X 18 OTHER FIFO, CPGA68 |
| PDM44068SA5JI | 64K X 18 CACHE SRAM, PQCC52 |
| PDSP16350/B0/AC | 34-BIT, DSP-NUM CONTROLLED OSCILLATOR, CPGA84 |
| PDSP16488AMAACBR | 16-BIT, DSP-CONVOLVER, CPGA84 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PDM41258SA8SO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41258SA8SOI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10DI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。