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參數(shù)資料
| 型號： | PDM41258SA7SO |
| 元件分類： | SRAM |
| 英文描述： | 64K X 4 STANDARD SRAM, 7 ns, PDSO24 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 353K |
| 代理商： | PDM41258SA7SO |
Rev. 2.2 - 4/27/98
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Features
n High speed access times
Com’l: 7, 8, 10, 12 and 15 ns
Ind’l: 8, 10, 12 and 15 ns
n Low power operation (typical)
- PDM41258SA
Active: 400 mW
Standby: 150 mW
- PDM41258LA
Active: 350 mW
Standby: 25 mW
n Single +5V (±10%) power supply
n TTL compatible inputs and outputs
n Packages
Plastic SOJ (300 mil) - SO
Description
The PDM41258 is a high-performance CMOS static
RAM organized as 65,536 x 4 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
Reading is accomplished when WE remains HIGH
and CE goes LOW.
The PDM41258 operates from a single +5V power
supply and all the inputs and outputs are fully TTL-
compatible. The PDM41258 comes in two versions,
the standard power version PDM41258SA and a low
power version the PDM41258LA. The two versions
are functionally the same and only differ in their
power consumption.
The PDM41258 is available in a 24-pin 300-mil plas-
tic SOJ for surface mount applications.
A
A
0
15
I/O
0
1
2
3
CE
WE
Addresses
Decoder
Memory
Matrix
Input
Data
Control
Column I/O
Functional Block Diagram
PDM41258
256K Static RAM
64K x 4-Bit
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|---|---|
| PDM41298SA20TI | 64K X 4 STANDARD SRAM, 20 ns, PDSO28 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDM41258SA8SO | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41258SA8SOI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10DI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10P | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
| PDM41298LA10PI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x4 SRAM |
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