- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄367854 > PDI1394P22 (NXP Semiconductors N.V.) 3-port Physical Layer Interface(三端口物理層接口) PDF資料下載
參數(shù)資料
| 型號： | PDI1394P22 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 3-port Physical Layer Interface(三端口物理層接口) |
| 中文描述： | 三端口物理層接口（三端口物理層接口） |
| 文件頁數(shù)： | 2/30頁 |
| 文件大小： | 163K |
| 代理商： | PDI1394P22 |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁
Philips Semiconductors
Objective specification
PDI1394P22
3-port physical layer interface
2
1999 Jul 09
1.0
Fully supports provisions of IEEE 1394–1995 Standard for high
performance serial bus and the P1394a supplement (Version 2.0)
1
Full P1394a support includes:
–
Connection debounce
–
Arbitrated short reset
–
Multispeed concatenation
–
Arbitration acceleration
–
Fly-by concatenation
–
Port disable/suspend/resume
Provides three 1394a fully-compliant cable ports at
100/200/400 Megabits per second (Mbits/s)
Fully compliant with Open HCI requirements
Cable ports monitor line conditions for active connection to remote
node.
Power down features to conserve energy in battery-powered
applications include:
–
Automatic device power down during suspend
–
Device power down terminal
–
Link interface disable via LPS
–
Inactive ports powered-down
Logic performs system initialization and arbitration functions
Encode and decode functions included for data-strobe bit level
encoding
Incoming data resynchronized to local clock
Single 3.3 volt supply operation
Minimum V
DD
of 2.7 V for end-of-wire power-consuming devices
While unpowered and connected to the bus, will not drive TPBIAS
on a connected port, even if receiving incoming bias voltage on
that port
FEATURES
Supports extended bias-handshake time for enhanced
interoperability with camcorders
Interface to link-layer controller supports low-cost bus-holder
isolation and optional Annex J electrical isolation
Data interface to link-layer controller through 2/4/8 parallel lines at
49.152 MHz
Low-cost 24.576 MHz crystal provides transmit, receive data at
100/200/400 Mbits/s, and link-layer controller clock at 49.152 MHz
Does not require external filter capacitors for PLL
Interoperable with link-layer controllers using 3.3 V and 5 V
supplies
Interoperable with other Physical Layers (PHYs) using 3.3 V and
5 V supplies
Node power class information signaling for system power
management
Cable power presence monitoring
Separate cable bias (TPBIAS) for each port
Register bits give software control of contender bit, power class
bits, link active bit, and 1394a features
Fully interoperable with FireWire
implementation of IEEE Std 1394
Function and pin compatible with the Lucent FW803 400 Mbps Phy
2.0
The PDI1394P22 provides the digital and analog transceiver functions
needed to implement a three port node in a cable-based IEEE
1394–1995 and/or 1394a network. Each cable port incorporates two
differential line transceivers. The transceivers include circuitry to
monitor the line conditions as needed for determining connection
status, for initialization and arbitration, and for packet reception and
transmission. The PDI1394P22 is designed to interface with a Link
Layer Controller (LLC), such as the PDI1394L11 or PDI1394L21.
DESCRIPTION
3.0
ORDERING INFORMATION
PACKAGE
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
PKG. DWG. #
64-pin plastic LQFP
0
°
C to +70
°
C
PDI1394P22 BD
PDI1394P22 BD
SOT314-2
1.
Implements technology covered by one or more patents of Apple Computer, Incorporated and SGS Thompson, Limited.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PDI1394P24 | 2-port 400 Mbps physical layer interface(2端口 400 Mbps物理層接口) |
| PDI40C1D00 | |
| PDI40C1300 | |
| PDI40C130R | |
| PDI40C130X | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PDI1394P22BD | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:3-port physical layer interface |
| PDI1394P23 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:2-port/1-port 400 Mbps physical layer interface |
| PDI1394P23BD | 功能描述:IC IEEE 1394 LINK CTRLR 64LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標(biāo)準(zhǔn)包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| PDI1394P23BD,118 | 功能描述:輸入/輸出控制器接口集成電路 1394 2-PORT PHY NO NEW DESIGNS RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| PDI1394P23BD,151 | 功能描述:輸入/輸出控制器接口集成電路 DO NOT USE ORDER -T PART RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。