參數(shù)資料
型號: OX16C954-PCC60-B
廠商: Electronic Theatre Controls, Inc.
英文描述: High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface
中文描述: UART的高性能四路128字節(jié)的FIFO英特爾/摩托羅拉總線接口
文件頁數(shù): 6/54頁
文件大?。?/td> 529K
代理商: OX16C954-PCC60-B
Data Sheet Revision 1.0
Page 6
OX16C954 rev B
OXFORD SEMICONDUCTOR LTD.
thresholds for automatic flow control can be programmed
to operate at a variety of trigger levels.
TX/RX Disable:
The transmtter and receiver can be independently
disabled.
Additional status:
Software drivers are able to read the status of in-band and
out-of-band automatic flow control, and distinguish
between XOFF and special character received interrupts.
Software reset:
The software driver may reset the device to recover from
unforeseen or unusual error conditions.
Transmitter empty interrupt:
The transmtter can generate an interrupt when the FIFO
and shift register are both empty.
RS485 buffer enable:
The function of the DTR#pin may be re-assigned to buffer-
enable signal for RS485 line driver in half-duplex mode
(see ACR[4:3] in section 15.3).
Device ID:
Four bytes of device ID are available to identify the
OX16C954 device to software drivers.
Infrared ‘IrDA’ interface:
The UART contains an IrDA compliant modulator and
demodulator.
9-bit data framing
The UART may be configured for use in 9-bit character
framng for multi-drop protocols, where a tag ID (9
th
bit)
differentiates address and data characters.
Dual Voltage Operation(TQFP)
The 80pin TQFP package option can operate with supply
voltages of either 5.0v or 3.3v, thereby reducing inventory
controls.
The VDETECT pin will need to be set according
to the voltage environment.
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