- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄384801 > OX16C954-PCC60-B (Electronic Theatre Controls, Inc.) High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface PDF資料下載
參數(shù)資料
| 型號： | OX16C954-PCC60-B |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface |
| 中文描述： | UART的高性能四路128字節(jié)的FIFO英特爾/摩托羅拉總線接口 |
| 文件頁數(shù)： | 17/54頁 |
| 文件大?。?/td> | 529K |
| 代理商： | OX16C954-PCC60-B |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當(dāng)前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁
Data Sheet Revision 1.0
Page 17
OX16C954 rev B
OXFORD SEMICONDUCTOR LTD.
3. Infra-red “IrDA-format” transmt and receive mode
4. Transmt trigger levels
5. Optional clock prescaler
5.6
The additional features offered in 950 mode generally only
apply when the UART is in Enhanced mode (EFR[4]=’1’).
Provided FCR[0] is set, in Enhanced mode the FIFO size is
128 regardless of the state of FIFOSEL#
Note that 950 mode configuration is identical to that of 650
mode, however additional 950 specific features are
enabled using the Additional Control Register ‘ACR’ (see
section 15.3). In addition to larger FIFOs and higher baud
rates, the enhancements of the 950 mode over 650
emulation mode are:
Selectable arbitrary trigger levels for the receiver and
transmtter FIFO interrupts
Improved automatic flow control using selectable
arbitrary thresholds
DSR#/DTR#automatic flow control
Transmtter and receiver can be optionally disabled
Software reset of device
Readable FIFO fill levels
Optional generation of an RS-485 buffer enable signal
Four-byte device identification (0x16C95404)
Readable status for automatic in-band and out-of-
band flow control
External 1x clock modes (see section14.4)
Flexible “M+N/8” clock prescaler (see section 14.2)
Programmable sample clock to allow data rates up to
15 Mbps (see section 14.3).
9-bit data mode
The 950 trigger levels are enabled when ACR[5] is set (bits
4 to 7 of FCR are ignored). Then arbitrary trigger levels can
be defined in RTL, TTL, FCL and FCH registers (see
950 Mode
section 15). The Additional Status Register (‘ASR’) offers
flow control status for the local and remote transmtters.
FIFO levels are readable using RFL and TFL registers.
The UART has a flexible prescaler capable of dividing the
systemclock by any value between 1 and 31.875 in steps
of 0.125. It divides the systemclock by an arbitrary value in
“M+N/8” format, where Mand N are 5- and 3-bit binary
numbers programmed in CPR[7:3] and CPR[2:0]
respectively. This arrangement offers a great deal of
flexibility when choosing an input clock frequency to
synthesise arbitrary baud rates. The default division value
is 4 to provide backward compatibility with 16C650
devices.
The user may apply an external 1x (or Nx) clock for the
transmtter and receiver to the RI#and DSR#pin
respectively. The transmtter clock may instead be asserted
on the DTR#pin. The external clock options are selected
through the CKS register (offset 0x02 of ICR).
It is also possible to define the over-sampling rate used by
the transmtter and receiver clocks. The 16C450/16C550
and compatible devices employ 16 times over-sampling,
where there are 16 clock cycles per bit. However the 950
UART can employ any over-sampling rate from4 to 16 by
programmng the TCR register. This allows the data rates
to be increased to 460.8 Kbps using a 1.8432MHz clock, or
15 Mbps using a 60 MHz clock. The default value after a
reset for this register is 0x00, which corresponds to a 16
cycle sampling clock. Writing 0x01, 0x02 or 0x03 will also
result in a 16 cycle sampling clock. To programthe value to
any value from4 to 15 it is necessary to write this value
into the TCR i.e. to set the device to a 13 cycle sampling
clock it would be necessary to write 0x0D to TCR. For
further information see section 14.3.
The UART also offers 9-bit data frames for multi-drop
industrial applications.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OX16C954-TQC60-B | High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface |
| OX16CF950 | LOW COST ASYNCHRONOUS 16 BIT CARD |
| OX2000A | OCXO |
| OX2020A | OCXO |
| OX2420A | OCXO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OX16C954-PLBG | 制造商:Oxford Semiconductor 功能描述:IC UART 4CH SMD PLCC68 954 |
| OX16C954-TQBG | 功能描述:外圍驅(qū)動器與原件 - PCI High performance quad UART RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OX16C954-TQC60-B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Performance Quad UART with 128-byte FIFOs Intel / Motorola Bus Interface |
| OX16C95X | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:HIGH-PERFORMANCE UART FAMILY REFERENCE DRIVERS |
| OX16CB950 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Intelligent UART with 3.3v PCI/Cardbus Interface |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。