參數(shù)資料
型號： ORT82G5-2BM680
廠商： LATTICE SEMICONDUCTOR CORP
元件分類： FPGA
英文描述： FPGA, 1296 CLBS, 380000 GATES, PBGA680
封裝： PLASTIC, BGA-680
文件頁數(shù)： 49/110頁
文件大?。?/td> 1459K
代理商： ORT82G5-2BM680
Lattice Semiconductor
43
Data Sheet
January 25, 2002
8b/10b SERDES Backplane Interface FPSC
ORCA ORT82G5 1.0-1.25/2.0-2.5/3.125-3.5 Gbits/s
Memory Map (continued)
Table 18 details the memory map for the ASIC core of the ORT82G5 device. This table shows the databus oriented
for the PPC interface. DB0 is the MSB, while DB7 is the LSB. If the user master interface is used to preform opera-
tions to the ASIC core then the databus must be used in the opposite notation, where DB7 is the MSB and DB0 is
the LSB.
Table 18. Memory Map
Addr
(Hex)
Reg
#
DB0
DB1
DB2
DB3
DB4
DB5
DB6
DB7
Default
Value
SERDES A Alarm Registers (Read Only)
30000
—
Reserved
LKI_AA
Receive PLL Lock
Indication, Bank A,
Channel A. When
LKI_AA = 1, then
PLL receive is
locked.
PRBSCHK_AA
PRBS Check Pass/
Fail Indication, Bank
A, Channel A. When
PRBSCHK_AA = 0,
then it is a pass indi-
cation.
PRBSTOUT_AA
PRBS Checker Watch-
dog Timer Time-Out
Alarm, Bank A, Channel
A. When
PRBSTOUT_AA = 1,
then timeout has
occurred.
————
00
30010
—
Reserved
LKI_AB
Receive PLL Lock
Indication, Bank A,
Channel B. When
LKI_AB = 1, then
PLL receive is
locked.
PRBSCHK_AB
PRBS Check Pass/
Fail Indication, Bank
A, Channel B. When
PRBSCHK_AB = 0,
then it is a pass indi-
cation.
PRBSTOUT_AB
PRBS Checker Watch-
dog Timer Time-Out
Alarm, Bank A, Channel
B. When
PRBSTOUT_AB = 1,
then timeout has
occurred.
————
00
30020
—
Reserved
LKI_AC
Receive PLL Lock
Indication, Bank A,
Channel C. When
LKI_AC = 1, then
PLL receive is
locked.
PRBSCHK_AC
PRBS Check Pass/
Fail Indication, Bank
A, Channel C. When
PRBSCHK_AC = 0,
then it is a pass indi-
cation.
PRBSTOUT_AC
PRBS Checker Watch-
dog Timer Time-Out
Alarm, Bank A, Channel
C. When
PRBSTOUT_AC = 1,
then timeout has
occurred.
————
00
30030
—
Reserved
LKI_AD
Receive PLL Lock
Indication, Bank A,
Channel D. When
LKI_AD = 1, then
PLL receive is
locked.
PRBSCHK_AD
PRBS Check Pass/
Fail Indication, Bank
A, Channel D. When
PRBSCHK_AD = 0,
then it is a pass indi-
cation.
PRBSTOUT_AD
PRBS Checker Watch-
dog Timer Time-Out
Alarm, Bank A, Channel
D. When
PRBSTOUT_AD = 1,
then timeout has
occurred.
————
00
SERDES A Alarm Mask Registers
30001
—
Reserved
MLKI_AA
Mask Receive PLL
Lock Indication, Bank
A, Channel A.
MPRBSCHK_AA.
Mask PRBS Check
Pass/Fail Indication,
Bank A, Channel A.
MPRBSTOUT_AA
Mask PRBS Checker
Watchdog Timer Time-
Out Alarm, Bank A,
Channel A.
————
FF
30011
—
Reserved
MLKI_AB
Mask Receive PLL
Lock Indication, Bank
A, Channel B.
MPRBSCHK_AB.
Mask PRBS Check
Pass/Fail Indication,
Bank A, Channel B.
MPRBSTOUT_AB
Mask PRBS Checker
Watchdog Timer Time-
Out Alarm, Bank A,
Channel B.
————
FF
30021
—
Reserved
MLKI_AC
Mask Receive PLL
Lock Indication, Bank
A, Channel C.
MPRBSCHK_AC.
Mask PRBS Check
Pass/Fail Indication,
Bank A, Channel C.
MPRBSTOUT_AC
Mask PRBS Checker
Watchdog Timer Time-
Out Alarm, Bank A,
Channel C.
————
FF
30031
—
Reserved
MLKI_AD
Mask Receive PLL
Lock Indication, Bank
A, Channel D.
MPRBSCHK_AD.
Mask PRBS Check
Pass/Fail Indication,
Bank A, Channel D.
MPRBSTOUT_AD
Mask PRBS Checker
Watchdog Timer Time-
Out Alarm, Bank A,
Channel D.
————
FF
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ORT82G5-2BM680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-2BM680I 功能描述:FPGA - 現(xiàn)場可編程門陣列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-2F680C 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7Gbits/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
ORT82G5-2F680I 功能描述:FPGA - 現(xiàn)場可編程門陣列 ORCA FPSC 2.7GBITS/s BP XCVR 643K RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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