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參數(shù)資料
| 型號： | MT93L00AV |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Multi-Channel Voice Echo Canceller |
| 中文描述： | DATACOM, ISDN ECHO CANCELLER, PBGA208 |
| 封裝： | 17 X 17 MM, 1.30 MM HEIGHT, MO-192, LBGA-208 |
| 文件頁數(shù)： | 13/39頁 |
| 文件大?。?/td> | 636K |
| 代理商： | MT93L00AV |
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MT93L00A
Data Sheet
13
Zarlink Semiconductor Inc.
Disable Adaptation
When the Disable Adaptation state is selected, the Adaptive Filter coefficients are frozen at their current value. The
adaptation process is halted, however, the echo canceller continues to cancel echo.
Enable Adaptation
In Enable Adaptation state, the Adaptive Filter coefficients are continually updated. This allows the echo canceller
to model the echo return path characteristics in order to cancel echo. This is the normal operating state.
The echo canceller functions are selected in Control Register A1/B1 and Control Register 2 through four control
bits: MuteS, MuteR, Bypass and AdaptDis. Refer to the Registers Description for details.
Figure 7 - ST-BUS and GCI Interface Channel Assignment for 2 Mbps Data Streams
MT93L00 Throughput Delay
The throughput delay of the MT93L00 varies according to the device configuration. For all device configurations,
Rin to Rout has a delay of two frames and Sin to Sout has a delay of three frames. In Bypass state, the Rin to Rout
and Sin to Sout paths have a delay of two frames.
Serial PCM I/O channels
There are two sets of TDM I/O streams, each with channels numbered from 0 to 31. One set of input streams is for
Receive (Rin) channels, and the other set of input streams is for Send (Sin) channels. Likewise, one set of output
streams is for Rout pcm channels, and the other set is for Sout channels. See Figure 7 for channel allocation.
The arrangement and connection of PCM channels to each echo canceller is a two port I/O configuration for each
set of PCM Send and Receive channels, as illustrated in Figure 4.
Serial Data Interface Timing
The MT93L00 provides ST-BUS and GCI interface timing. The Serial Interface clock frequency, C4i, is 4.096 MHz.
The input and output data rate of the ST-Bus and GCI bus is 2.048 Mbps.
The 8 KHz input frame pulse can be in either ST-BUS or GCI format. The MT93L00 automatically detects the
presence of an input frame pulse and identifies it as either ST-BUS or GCI. In ST-BUS format, every second falling
edge of the C4i clock marks a bit boundary, and the data is clocked in on the rising edge of C4i, three quarters of
the way into the bit cell (See Figure 11). In GCI format, every second rising edge of the C4i clock marks the bit
boundary, and data is clocked in on the second falling edge of C4i, half the way into the bit cell (see Figure 12).
F0i
ST-Bus
Rin/Sin
Rout/Sout
Channel 31
Channel 0
125
μ
sec
Channel 1
Channel 30
F0i
GCI interface
Note: Refer to Figures 11 and 12 for timing details
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相關代理商/技術參數(shù) |
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| MT93L04 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:128-Channel Voice Echo Canceller |
| MT93L04A | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:128-Channel Voice Echo Canceller |
| MT93L04AG | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 128CH G.164/G.165/G.168/G.711 W/ TONE DE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 365MCMBGA |
| MT93L04AG2 | 制造商:Microsemi Corporation 功能描述:ECHO CANCELLER CHIP 128CH G.164/G.165/G.168/G.711 W/ TONE DE - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC VOICE ECHO CANCEL 365MCMBGA 制造商:Microsemi Corporation 功能描述:IC VOICE ECHO CANCEL 365MCMBGA |
| MT93L16 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:AEC with Noise Reduction & Codecs for Digital Hands-Free Communication |
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