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參數(shù)資料
| 型號： | MT91L61ASR1 |
| 廠商： | ZARLINK SEMICONDUCTOR INC |
| 元件分類： | 編解碼器 |
| 英文描述： | 3 Volt Multi-Featured Codec (MFC) |
| 中文描述： | A/MU-LAW, PROGRAMMABLE CODEC, PDSO24 |
| 封裝： | LEAD FREE, SOIC-24 |
| 文件頁數(shù)： | 1/33頁 |
| 文件大?。?/td> | 527K |
| 代理商： | MT91L61ASR1 |
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1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.
Features
Single 2.7-3.6 volt supply operation
MT91L61 version features a delayed framing
pulse in SSI and ST-BUS modes to facilitate
cascaded devices
Programmable
μ
-Law/A-Law Codec and Filters
Programmable ITU-T (G.711)/sign-magnitude
coding
Programmable transmit, receive and side-tone
gains
Fully differential interface to handset transducers
- including 300 ohm receiver driver
Flexible digital interface including ST-BUS/SSI
Serial microport
Low power operation
ITU-T G.714 compliant
Multiple power down modes
Applications
Battery operated equipment
Digital telephone sets
Cellular radio sets
Pair Gain Systems
Line cards
March 2006
Ordering Information
MT91L61AE
MT91L60AE
MT91L61AS
MT91L60AS
MT91L61AN
MT91L60AN
MT91L60ASR
MT91L61ASR
MT91L61ASR1
MT9160AN1
24 Pin PDIP
24 Pin PDIP
24 Pin SOIC
20 Pin SOIC
24 Pin SSOP
20 Pin SSOP
20 Pin SOIC
24 Pin SOIC
24 Pin SOIC*
20 Pin SSOP*
*Pb Free Matte Tin
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tubes
-40
°
C to +85
°
C
ISO
2
-CMOS
MT91L60/61
3 Volt Multi-Featured Codec (MFC)
Data Sheet
Figure 1 - Functional Block Diagram
M -
M +
HSPKR +
HSPKR -
FILTER/CODEC GAIN
ENCODER
DECODER
7dB
-7dB
Transducer
Interface
Flexible
Digital
Interface
Timing
ST-BUS
C & D
Channels
Serial Microport
A/
μ
/IRQ
VSSD
VDD
VSSA
VBias
VRef
Din
Dout
STB/F0i
CLOCKin
PWRST
IC
CS
DATA1
DATA2
SCLK
STBd/FOod
(MT91L61only)
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| MT91L62AS | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:ISO2-CMOS 3 Volt Single Rail Codec |
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