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參數(shù)資料
| 型號(hào)： | MT90221 |
| 廠商： | Mitel Networks Corporation |
| 英文描述： | Quad IMA/UNI PHY Device |
| 中文描述： | 四IMA的/單向物理層設(shè)備 |
| 文件頁(yè)數(shù)： | 100/114頁(yè) |
| 文件大?。?/td> | 304K |
| 代理商： | MT90221 |
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MT90221
92
9.1
The CPU Interface of the MT90221 supports both
the Motorola and Intel timing modes. No Mode
Select pin is required.
CPU Interface Timing
With Motorola devices, the Motorola R/W-signal is
connected to the UP_R/W* pin and the UP_OE* pin
is tied to ground. There is no DS signal and the
UP_CS* signal is taken to be qualified with the DS
signal.
When used with Intel devices, the READ-signal is
connected to the UP_OE* pin and the WRITE-signal
is connected to the UP_R/W* pin.
When performing a read operation, data is placed on
the bus immediately after UP_CS* is LOW for the
Motorola timing mode and after the UP_CS* and
UP_OE*signals are LOW for Intel timing.
When performing a write operation in Motorola
timing mode, the data is clocked into an MT90221
pre-load register on the rising edge of the UP_CS*
signal. In Intel timing mode, the data is clocked into
MT90221 pre-load register on the rising edge of the
UP_R/W* signal. Right after that transition, the data
is transferred to the MT90221’s internal register.
Writing data into the this register can take up 2
system clock cycles.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MT90221AL | Quad IMA/UNI PHY Device |
| MT9041B | T1/E1 System Synchronizer |
| MT9041BP | T1/E1 System Synchronizer |
| MT9041 | Multiple Output Trunk PLL |
| MT9041AP | IC REG LDO 150MA 5.0V 0.5% 8SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MT90221AL | 制造商:MITEL 制造商全稱:Mitel Networks Corporation 功能描述:Quad IMA/UNI PHY Device |
| MT90222 | 制造商:ZARLINK 制造商全稱:Zarlink Semiconductor Inc 功能描述:4/8/16 Port IMA/TC PHY Device |
| MT90222AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA - Trays |
| MT90222AG2 | 制造商:Microsemi Corporation 功能描述:ATM IMA 40MBPS 2.5V 384BGA /BAKE/DRYPACK - Trays |
| MT90223AG | 制造商:Microsemi Corporation 功能描述:ATM IMA 80MBPS 2.5V 384BGA - Trays |
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